LMX2470

アクティブ

800MHz 整数 N 分周 PLL 搭載、2.6GHz デルタ シグマ分数 N 分周 PLL

製品詳細

Frequency (max) (MHz) 2600 Frequency (min) (MHz) 500 Normalized PLL phase noise (dBc/Hz) -210 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -104 Features Cycle slip reduction, Delta-sigma modulation, Dual PLL, Fastlock, Integrated timeout counter, On-chip input frequency doubler Current consumption (mA) 3.9 Integrated VCO No Operating temperature range (°C) -40 to 85 Rating Catalog Lock time (µs) (typ) (s) Loop BW dependent
Frequency (max) (MHz) 2600 Frequency (min) (MHz) 500 Normalized PLL phase noise (dBc/Hz) -210 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -104 Features Cycle slip reduction, Delta-sigma modulation, Dual PLL, Fastlock, Integrated timeout counter, On-chip input frequency doubler Current consumption (mA) 3.9 Integrated VCO No Operating temperature range (°C) -40 to 85 Rating Catalog Lock time (µs) (typ) (s) Loop BW dependent
ULGA (NPF) 24 15.75 mm² 3.5 x 4.5
  • Low In-Band Phase Noise and Low Fractional Spurs
  • 12 Bit or 22 Bit Selectable Fractional Modulus
  • Up to 4th Order Programmable Delta-Sigma Modulator
  • Enhanced Anti-Cycle Slip Fastlock Circuitry
    • Fastlock
    • Cycle Slip Reduction
    • Integrated Timeout Counters
  • Digital Lock Detect Output
  • Prescalers Allow Wide Range of N Values
    • RF PLL: 16/17/20/21
    • IF PLL: 8/9 or 16/17
  • Crystal Reference Frequency up to 110 MHz
  • On-chip Crystal Reference Frequency Doubler.
  • Phase Comparison Frequency up to 30 MHz
  • Hardware and Software Power-down Control
  • Ultra Low Consumption: ICC = 4.1 mA (Typical)

All trademarks are the property of their respective owners.

  • Low In-Band Phase Noise and Low Fractional Spurs
  • 12 Bit or 22 Bit Selectable Fractional Modulus
  • Up to 4th Order Programmable Delta-Sigma Modulator
  • Enhanced Anti-Cycle Slip Fastlock Circuitry
    • Fastlock
    • Cycle Slip Reduction
    • Integrated Timeout Counters
  • Digital Lock Detect Output
  • Prescalers Allow Wide Range of N Values
    • RF PLL: 16/17/20/21
    • IF PLL: 8/9 or 16/17
  • Crystal Reference Frequency up to 110 MHz
  • On-chip Crystal Reference Frequency Doubler.
  • Phase Comparison Frequency up to 30 MHz
  • Hardware and Software Power-down Control
  • Ultra Low Consumption: ICC = 4.1 mA (Typical)

All trademarks are the property of their respective owners.

The LMX2470 is a low power, high performance delta-sigma fractional-N PLL with an auxiliary integer-N PLL. The device is fabricated using TI’s advanced BiCMOS process.

With delta-sigma architecture, fractional spur compensation is achieved with noise shaping capability of the delta-sigma modulator and the inherent low pass filtering of the PLL loop filter. Fractional spurs at lower frequencies are pushed to higher frequencies outside the loop bandwidth. Unlike analog compensation, the digital feedback techniques used in the LMX2470 are highly resistant to changes in temperature and variations in wafer processing. With delta-sigma architecture, the ability to push close in spur and phase noise energy to higher frequencies is a direct function of the modulator order. The higher the order, the more this energy can be spread to higher frequencies. The LMX2470 has a programmable modulator up to order four, which allows the designer to select the optimum modulator order to fit the phase noise, spur, and lock time requirements of the system.

Programming is fast and simple. Serial data is transferred into the LMX2470 via a three line MICROWIRE interface (Data, Clock, Load Enable). Nominal supply voltage is 2.5 V. The LMX2470 features a typical current consumption of 4.1 mA at 2.5 V. The LMX2470 is available in a 24 lead 3.5 X 4.5 X 0.6 mm package.

The LMX2470 is a low power, high performance delta-sigma fractional-N PLL with an auxiliary integer-N PLL. The device is fabricated using TI’s advanced BiCMOS process.

With delta-sigma architecture, fractional spur compensation is achieved with noise shaping capability of the delta-sigma modulator and the inherent low pass filtering of the PLL loop filter. Fractional spurs at lower frequencies are pushed to higher frequencies outside the loop bandwidth. Unlike analog compensation, the digital feedback techniques used in the LMX2470 are highly resistant to changes in temperature and variations in wafer processing. With delta-sigma architecture, the ability to push close in spur and phase noise energy to higher frequencies is a direct function of the modulator order. The higher the order, the more this energy can be spread to higher frequencies. The LMX2470 has a programmable modulator up to order four, which allows the designer to select the optimum modulator order to fit the phase noise, spur, and lock time requirements of the system.

Programming is fast and simple. Serial data is transferred into the LMX2470 via a three line MICROWIRE interface (Data, Clock, Load Enable). Nominal supply voltage is 2.5 V. The LMX2470 features a typical current consumption of 4.1 mA at 2.5 V. The LMX2470 is available in a 24 lead 3.5 X 4.5 X 0.6 mm package.

ダウンロード 字幕付きのビデオを表示 ビデオ

技術資料

star =TI が選定したこの製品の主要ドキュメント
結果が見つかりませんでした。検索条件をクリアしてから、再度検索を試してください。
5 をすべて表示
上位の文書 タイプ タイトル フォーマットオプション 最新の英語版をダウンロード 日付
* データシート LMX2470 2.6 GHz Delta-Sigma Fractional-N PLL with 800 MHz Integer-N PLL データシート (Rev. B) 2013年 3月 6日
アプリケーション・ノート AN-1879 Fractional N Frequency Synthesis (Rev. B) 2021年 11月 18日
ユーザー・ガイド USB Interface Board for use with LMK and LMX User Guide 2012年 1月 27日
ユーザー・ガイド 2.6 GHz Delta-Sigma Fractional-N PLL with 800 MHz Integer-N PLL 2012年 1月 26日
アプリケーション・ノート Delta Sigma PLLs Raise The Standard For Performance 2003年 3月 5日

設計と開発

その他のアイテムや必要なリソースを参照するには、以下のタイトルをクリックして詳細ページをご覧ください。

ソフトウェア・プログラミング・ツール

CODELOADER CodeLoader Device Register Programming v4.19.0

The CodeLoader 4 software is used to program the LMX PLLs and LMK timing devices through either the USB or line print terminal (LPT) port of a computer. This software also provides information on how to program the device by showing the bits that are actually sent.

Which software do I use?

Product

(...)

サポート対象の製品とハードウェア

サポート対象の製品とハードウェア

設計ツール

PLLATINUMSIM-SW PLL loop filter, phase noise, lock time, and spur simulation tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

サポート対象の製品とハードウェア

サポート対象の製品とハードウェア

ダウンロードオプション
パッケージ ピン数 CAD シンボル、フットプリント、および 3D モデル
ULGA (NPF) 24 Ultra Librarian

購入と品質

記載されている情報:
  • RoHS
  • REACH
  • デバイスのマーキング
  • リード端子の仕上げ / ボールの原材料
  • MSL 定格 / ピーク リフロー
  • MTBF/FIT 推定値
  • 使用材料
  • 認定試験結果
  • 継続的な信頼性モニタ試験結果
記載されている情報:
  • ファブ拠点
  • アセンブリ拠点

サポートとトレーニング

TI E2E™ フォーラムでは、TI のエンジニアからの技術サポートを提供

コンテンツは、TI 投稿者やコミュニティ投稿者によって「現状のまま」提供されるもので、TI による仕様の追加を意図するものではありません。使用条件をご確認ください。

TI 製品の品質、パッケージ、ご注文に関するお問い合わせは、TI サポートをご覧ください。​​​​​​​​​​​​​​

ビデオ