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UCC27517A-Q1

現行

產品詳細資料

Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 4 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 125 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) -5 Rating Automotive Undervoltage lockout (typ) (V) 4 Driver configuration Inverting, Non-Inverting
Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 4 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 125 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) -5 Rating Automotive Undervoltage lockout (typ) (V) 4 Driver configuration Inverting, Non-Inverting
SOT-23 (DBV) 5 8.12 mm² (2.9 mm × 2.8 mm)
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Automotive Qualified Grade 1: –40°C
      to 125°C Ambient Operating Temperature
      Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C6
  • Low-Cost Gate-Driver Device Offering Superior
    Replacement of NPN and PNP Discrete Solutions
  • 4-A Peak-Source and Sink Symmetrical Drive
  • Ability to Handle Negative Voltages (–5 V) at
    Inputs
  • Fast Propagation Delays (13-ns typical)
  • Fast Rise and Fall Times (9-ns and 7-ns typical)
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD UVLO (ensures
    glitch-free operation at power up and power down)
  • TTL and CMOS Compatible Input-Logic Threshold
    (independent of supply voltage)
  • Hysteretic-Logic Thresholds for High-Noise
    Immunity
  • Dual Input Design (choice of an inverting (IN– pin)
    or non-inverting (IN+ pin) driver configuration)
    • Unused Input Pin can be Used for Enable or
      Disable Function
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to 140°C
  • 5-Pin DBV (SOT-23) Package Option
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Automotive Qualified Grade 1: –40°C
      to 125°C Ambient Operating Temperature
      Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C6
  • Low-Cost Gate-Driver Device Offering Superior
    Replacement of NPN and PNP Discrete Solutions
  • 4-A Peak-Source and Sink Symmetrical Drive
  • Ability to Handle Negative Voltages (–5 V) at
    Inputs
  • Fast Propagation Delays (13-ns typical)
  • Fast Rise and Fall Times (9-ns and 7-ns typical)
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD UVLO (ensures
    glitch-free operation at power up and power down)
  • TTL and CMOS Compatible Input-Logic Threshold
    (independent of supply voltage)
  • Hysteretic-Logic Thresholds for High-Noise
    Immunity
  • Dual Input Design (choice of an inverting (IN– pin)
    or non-inverting (IN+ pin) driver configuration)
    • Unused Input Pin can be Used for Enable or
      Disable Function
  • Output Held Low when Input Pins are Floating
  • Input Pin Absolute Maximum Voltage Levels Not
    Restricted by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to 140°C
  • 5-Pin DBV (SOT-23) Package Option

The UCC27517A-Q1 single-channel high-speed low-side gate-driver device effectively drives MOSFET and IGBT power switches. With a design that inherently minimizes shoot-through current, the UCC27517A-Q1 sources and sinks high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 13 ns.

The UCC27517A-Q1 device handles –5 V at input.

The UCC27517A-Q1 provides 4-A source and 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC27517A-Q1 operates over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal Undervoltage Lockout (UVLO) circuitry on VDD pin holds the output low outside VDD operating range. The ability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power-semiconductor devices.

The UCC27517A-Q1 single-channel high-speed low-side gate-driver device effectively drives MOSFET and IGBT power switches. With a design that inherently minimizes shoot-through current, the UCC27517A-Q1 sources and sinks high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 13 ns.

The UCC27517A-Q1 device handles –5 V at input.

The UCC27517A-Q1 provides 4-A source and 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC27517A-Q1 operates over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal Undervoltage Lockout (UVLO) circuitry on VDD pin holds the output low outside VDD operating range. The ability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power-semiconductor devices.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 UCC27517A-Q1 Single-Channel High-Speed Low-Side Gate Driver with Negative Input Voltage Capability (with 4-A Peak Source and Sink) datasheet (Rev. B) PDF | HTML 2015/8/28
應用說明 Riding the Wave of Non-Isolated Gate Drivers in LEVs PDF | HTML 2025/11/14
Application brief Why Low-Side Gate Drivers are Better Than Discrete Designs PDF | HTML 2025/11/13
應用說明 Selecting Gate Drivers for HVAC Systems (Rev. A) PDF | HTML 2025/11/7
應用說明 Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs PDF | HTML 2024/1/22
應用說明 Using a Single-Output Gate-Driver for High-Side or Low-Side Drive (Rev. B) PDF | HTML 2023/9/8
應用說明 Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 2021/11/10
功能安全資訊 UCC27517A-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA PDF | HTML 2021/6/16
Application brief External Gate Resistor Selection Guide (Rev. A) 2020/2/28
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 2020/2/28
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 2019/1/18
更多文件說明 Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 2018/10/29
Application brief Enable Function with Unused Differential Input 2018/7/11
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 2018/3/16

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使用指南: PDF | HTML
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模擬型號

UCC27517 PSpice Transient Model (Rev. B)

SLUM286B.ZIP (51 KB) - PSpice 模型
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模擬型號

UCC27517 TINA-TI Transient Reference Design

SLUM317.TSC (67 KB) - TINA-TI 參考設計
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模擬型號

UCC27517 TINA-TI Transient Spice Model

SLUM318.ZIP (8 KB) - TINA-TI Spice 模型
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模擬型號

UCC27517 Unencrypted PSpice Transient Model

SLUM491.ZIP (2 KB) - PSpice 模型
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計算工具

SLURB28 — UCC27516 and UCC27517 Schematic Review Template

This can be used to help the design engineer effectively select components and perform the layout to optimize their system for the gate driver.
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參考設計

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOT-23 (DBV) 5 Ultra Librarian

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