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SN74LVC2T45-Q1

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Automotive Catalog Dual-Bit Dual Supply Transceiver with Configurable Voltage Translation

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Data sheet

SN74LVC2T45-Q1

ACTIVE
Data sheet Order now

Product details

Bits (#) 2 Data rate (max) (Mbps) 420 Topology Push-Pull Direction control (typ) Direction-controlled Vin (min) (V) 1.65 Vin (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 Applications GPIO, I2S, UART Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff) Prop delay (ns) 3.9 Technology family LVC Supply current (max) (mA) 0.004 Rating Automotive Operating temperature range (°C) -40 to 125
Bits (#) 2 Data rate (max) (Mbps) 420 Topology Push-Pull Direction control (typ) Direction-controlled Vin (min) (V) 1.65 Vin (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 Applications GPIO, I2S, UART Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff) Prop delay (ns) 3.9 Technology family LVC Supply current (max) (mA) 0.004 Rating Automotive Operating temperature range (°C) -40 to 125
VSSOP (DCU) 8 6.2 mm² 2 x 3.1

  • AEC-Q100 qualified for automotive applications

  • Fully configurable dual-rail design allows each port to operate over the full 1.65V to 5.5V power-supply range
  • VCC isolation feature – if either VCC input is at GND, both ports are in the high-impedance state
  • DIR input circuit referenced to VCCA
  • Low power consumption, 10µA maximum ICC
  • ±24mA output drive at 3.3V
  • Ioff supports Partial-Power-Down mode operation
  • Maximum data rates:
    • 420Mbps (3.3V to 5V translation)
    • 210Mbps (translate to 3.3V)
    • 140Mbps (translate to 2.5V)
    • 75Mbps (translate to 1.8V)

  • AEC-Q100 qualified for automotive applications

  • Fully configurable dual-rail design allows each port to operate over the full 1.65V to 5.5V power-supply range
  • VCC isolation feature – if either VCC input is at GND, both ports are in the high-impedance state
  • DIR input circuit referenced to VCCA
  • Low power consumption, 10µA maximum ICC
  • ±24mA output drive at 3.3V
  • Ioff supports Partial-Power-Down mode operation
  • Maximum data rates:
    • 420Mbps (3.3V to 5V translation)
    • 210Mbps (translate to 3.3V)
    • 140Mbps (translate to 2.5V)
    • 75Mbps (translate to 1.8V)

This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65V to 5.5V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65V to 5.5V. This allows for universal low-voltage bidirectional translation between any of the 1.8V, 2.5V, 3.3V, and 5V voltage nodes.

The SN74LVC2T45-Q1 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports are always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.

The SN74LVC2T45-Q1 is designed so that VCCA supplies the DIR input circuit. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature is designed so that if either VCC input is at GND, both ports are in the high-impedance state.

This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65V to 5.5V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65V to 5.5V. This allows for universal low-voltage bidirectional translation between any of the 1.8V, 2.5V, 3.3V, and 5V voltage nodes.

The SN74LVC2T45-Q1 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports are always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.

The SN74LVC2T45-Q1 is designed so that VCCA supplies the DIR input circuit. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature is designed so that if either VCC input is at GND, both ports are in the high-impedance state.
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Technical documentation

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* Data sheet SN74LVC2T45-Q1 Automotive Dual-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation datasheet (Rev. C) PDF | HTML 22 Jul 2024
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Design & development

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Evaluation board

5-8-LOGIC-EVM — Generic logic evaluation module for 5-pin to 8-pin DCK, DCT, DCU, DRL and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
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Evaluation board

AVCLVCDIRCNTRL-EVM — Generic EVM for Direction-Controlled Bidirectional Translation Device Supporting AVC and LVC

The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC (...)

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