TPS7H3301-SP

ACTIVO

Reg. LDO 2.3 V a 3.5 V entr., 3 A fuente y disipador terminación DDR, QML-V, resist. a radiación

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Hoja de datos

document-pdfAcrobat TPS7H3301-SP Sink and Source Radiation-Hardened 3-A DDR Termination Regulator With Built-In VTTREF Buffer datasheet (Rev. C) (Inglés) PDF | HTML

TPS7H3301-SP

ACTIVO

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Detalles del producto

DDR memory type

DDR2, DDR3, DDR4

Control mode

S3, S4/S5

Iout VTT (max) (A)

3

Iq (typ) (mA)

18

Output

VREF, VTT

Vin (min) (V)

0.9

Vin (max) (V)

3.5

Features

Complete Solution, Shutdown Pin for S3

Rating

Space

Operating temperature range (°C)

-55 to 125

Regulator type

Linear Regulator

Vin bias (max) (V)

3.5

Vin bias (min) (V)

2.375

Vout VTT (min) (V)

0.6

DDR memory type

DDR2, DDR3, DDR4

Control mode

S3, S4/S5

Iout VTT (max) (A)

3

Iq (typ) (mA)

18

Output

VREF, VTT

Vin (min) (V)

0.9

Vin (max) (V)

3.5

Features

Complete Solution, Shutdown Pin for S3

Rating

Space

Operating temperature range (°C)

-55 to 125

Regulator type

Linear Regulator

Vin bias (max) (V)

3.5

Vin bias (min) (V)

2.375

Vout VTT (min) (V)

0.6

CFP (HKR)

16

105.6 mm² (— mm × — mm)

5962R14228(1):
- Radiation hardness assurance (RHA) qualified to total ionizing dose (TID) 100 krad(Si)
- Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune to LET = 70 MeV-cm2/mg(2)
- Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized to 70 MeV-cm2/mg(2)
Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
Input voltage: supports a 2.5-V and 3.3-V rail(3)
Separate low-voltage input (VLDOIN) down to 0.9 V for improved power efficiency(3)
3-A sink and source termination regulator includes droop compensation
Enable input and power-good output for power supply sequencing
VTT termination regulator
- Output voltage range: 0.5 to 1.75 V
- 3-A sink and source current
Integrated precision voltage divider network with sense input
Remote sensing (VTTSNS)
VTTREF buffered reference
- 49% to 51% accuracy with respect to VDDQSNS (±3 mA)
- ±10-mA sink and source current
Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated

5962R14228(1):
- Radiation hardness assurance (RHA) qualified to total ionizing dose (TID) 100 krad(Si)
- Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune to LET = 70 MeV-cm2/mg(2)
- Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized to 70 MeV-cm2/mg(2)
Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
Input voltage: supports a 2.5-V and 3.3-V rail(3)
Separate low-voltage input (VLDOIN) down to 0.9 V for improved power efficiency(3)
3-A sink and source termination regulator includes droop compensation
Enable input and power-good output for power supply sequencing
VTT termination regulator
- Output voltage range: 0.5 to 1.75 V
- 3-A sink and source current
Integrated precision voltage divider network with sense input
Remote sensing (VTTSNS)
VTTREF buffered reference
- 49% to 51% accuracy with respect to VDDQSNS (±3 mA)
- ±10-mA sink and source current
Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated

The TPS7H3301-SP is a TID and SEE radiation-hardened double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3301-SP supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR4. The fast transient response of the TPS7H3301-SP VTT regulator allows for a very stable supply during read/write conditions. During transients, the fast tracking feature of the VTTREF supply minimizes any voltage offset between VTT/Vo and VTTREF. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3301-SP. The PGOOD output is open-drain so it can be tied to multiple open-drain outputs to monitor when all supplies have come into regulation. The enable signal can also be used to discharge VTT/Vo during suspend to RAM (S3) power down mode.

The TPS7H3301-SP is a TID and SEE radiation-hardened double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3301-SP supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR4. The fast transient response of the TPS7H3301-SP VTT regulator allows for a very stable supply during read/write conditions. During transients, the fast tracking feature of the VTTREF supply minimizes any voltage offset between VTT/Vo and VTTREF. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3301-SP. The PGOOD output is open-drain so it can be tied to multiple open-drain outputs to monitor when all supplies have come into regulation. The enable signal can also be used to discharge VTT/Vo during suspend to RAM (S3) power down mode.

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TPS7H3302-SEP

ACTIVO

Regulador LDO, 2.3 V a 3.5 V de entr., 3 A fuente y disipador terminación DDR, tolerante a radiación -SEP plastic package with reduced TID and SEE radiation performance

TPS7H3302-SP

ACTIVO

Reg. LDO 2.3 V a 3.5 V entr., 3 A fuente y disipador terminación DDR, QML-P, resist. a radiación QMLP plastic package with same radiation performance

Documentación técnica

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Documentación principal	Tipo	Título	Opciones de formato	Fecha
*	Hoja de datos	TPS7H3301-SP Sink and Source Radiation-Hardened 3-A DDR Termination Regulator With Built-In VTTREF Buffer datasheet (Rev. C)	PDF \| HTML	27/09/2024
*	Informe de radiación y confiabilidad	TPS7H3301-SP and TPS7H3302-SP Single-Event Effects Radiation Report (Rev. C)		26/01/2024
*	Informe de radiación y confiabilidad	TPS7H3301-SP Neutron Displacement Damage Characterization		12/04/2019
*	Informe de radiación y confiabilidad	TPS7H3301-SP Total Ionizing Dose Radiation Report		1/07/2016
*	SMD	TPS7H3301-SP SMD 5962-14228		8/07/2016
	Guía de selección	TI Space Products (Rev. L)		27/03/2026
	Nota sobre la aplicación	Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and Form (Rev. A)	PDF \| HTML	5/11/2025
	Application brief	DLA Approved Optimizations for QML Products (Rev. C)	PDF \| HTML	17/06/2025
	Nota sobre la aplicación	Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. B)	PDF \| HTML	10/06/2025
	Más documentación	TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B)		20/02/2025
	Nota sobre la aplicación	Using Space Grade Power Components to Power AMD Kintex XQRKU060 FPGA	PDF \| HTML	8/11/2023
	Nota sobre la aplicación	Using Space Grade Power Components to Power Microchip RT PolarFire FPGA	PDF \| HTML	20/09/2023
	Nota sobre la aplicación	QML flow, its importance, and obtaining lot information (Rev. C)		30/08/2023
	Nota sobre la aplicación	Space Grade Power Solution for Microsemi RTG4	PDF \| HTML	2/05/2023
	Nota sobre la aplicación	TI Space Rated Power Solution for Microsemi® RTG4™ FPGA (Rev. B)	PDF \| HTML	19/01/2023
	Nota sobre la aplicación	Single-Event Effects Confidence Interval Calculations (Rev. A)	PDF \| HTML	19/10/2022
	Nota sobre la aplicación	DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer		21/08/2020
	Nota sobre la aplicación	DDR VTT Power Solutions: A Competitive Analysis (Rev. A)		9/07/2020
	Libro electrónico	Radiation Handbook for Electronics (Rev. A)		21/05/2019
	Nota sobre la aplicación	External Soft-Start Circuit for TPS7H3301-SP Power-Up Sequencing Applications		7/07/2016
	Artículo técnico	7 things to know about spacecraft subsystems before your next trip to Mars	PDF \| HTML	6/07/2016

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

TPS7H3301EVM-CVAL — Módulo de evaluación de terminación DDR TPS7H3301-SP

El regulador de terminación de doble tasa de datos (DDR) de fuente/disipador TPS7H3301-SP está diseñado para satisfacer las necesidades del sistema para aplicaciones de bajo ruido.

Se trata de una solución integrada con un tamaño reducido de la solución de sistema, una eficiencia mejorada e (...)

Guía del usuario: PDF

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Kit de desarrollo

ALPHA-XILINX-KU060-SPACE — Placa Alpha Data® para Xilinx® Kintex® UltraScale™ XQRKU060 FPGA con potencia TI

This is a development kit for the Xilinx® XQRKU060 FPGA with industrial -1 speed grade. ADA-SDEV-KIT2 has a modular board design with a XRTC-compatible configuration module, two FMC connectors, DDR3 DRAM, system monitoring, and space-grade TI power management and temperature-sensing solutions.

Desde: Alpha Data Parallel Systems Ltd.

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