LMK3H2104
4-output, PCIe Gen 1 to Gen 7 compliant, BAW reference-less clock generator, clock mux and buffer
LMK3H2104
- Integrated BAW resonator
- No need for external XTAL/XO
- Flexible output frequency
- 2 fraction output dividers (FOD), individual channel dividers
- Up to 400MHz output frequency
- Flexible output format
- 1.2/1.8/2.5/3.3V LVCMOS
- DC- or AC-coupled LVDS
- LP-HCSL with programmable swing. LVPECL, CML and other formats can be derived from LP-HCSL
- Very low jitter
- 61fs max PCIe Gen 5 CC with SSC jitter
- 36.4fs max PCIe Gen 6 CC with SSC jitter
- 25.5fs max PCIe Gen 7 CC with SSC jitter
- PCIe Gen 1 to Gen 7 compliant
- Configurable SSC
- Programmable -0.05% to -3% down spread and ±0.025% to ±1.5% center spread, or preset -0.1%, -0.25%, -0.3% and -0.5% down spread
- 1 input (LMK3H2104) that can be bypassed to any output
- 5ms max startup time
- Fail-safe input pins can be pulled high when device power is off
- Flexible power supply
- Each VDD pin can be independently connected to = 1.8, 2.5 or 3.3V
- Each VDDO pin can be independently connected set to 1.8, 2.5 or 3.3V
- -40 to 105°C ambient temperature
LMK3H2104 is a BAW-based clock generator that does not require any external XTAL or XO. The device can be used as PCIe clock generator or general purpose clock generator. The 2 FODs (Fractional Output Divider) provide frequency flexibility, low power and low jitter at the same time.
LMK3H2104 has up to 4 differential outputs plus 2 LVCMOS outputs or up to 10 LVCMOS outputs. The device also has one clock input. The clock input provides clock multiplexing and buffering ability. Each output bank can independently select any clock source.
The GPI and GPIO pins provide additional control flexibility. These pins can be configured as individual OE, grouped OE, I2C address selection, OTP page selection, PWRGD/PWRDN#, status output and other functions.
The device supports one-time programmable (OTP) non-volatile memory which can be customized and factory preprogrammed.
Technical documentation
Type | Title | Date | ||
---|---|---|---|---|
* | Data sheet | LMK3H2104 4-Output PCIe Gen 1-7 Compliant Low jitter General Purpose BAW Clock Generator datasheet | PDF | HTML | 28 Aug 2025 |
User guide | LMK3H2104 Register Map | PDF | HTML | 21 Aug 2025 | |
Certificate | LMK3H2104EVM EU Declaration of Conformity (DoC) | 22 Jul 2025 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
LMK3H2108-GUI — Programming GUI for the public release of the LMK3H2108 devices.
Supported products & hardware
Products
Clock generators
PLLATINUMSIM-SW — PLLatinum Sim Tool
PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
Supported products & hardware
Products
Clock buffers
Clock generators
Clock jitter cleaners
Oscillators
Hardware development
Evaluation board
Software
Support software
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
Package | Pins | CAD symbols, footprints & 3D models |
---|---|---|
VQFN (RGE) | 24 | Ultra Librarian |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
- Fab location
- Assembly location
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
TI E2E™ forums with technical support from TI engineers
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.