DS90LV012A

現行

產品詳細資料

Function Receiver Protocols BLVDS, LVDS, LVPECL Number of transmitters 0 Number of receivers 1 Signaling rate (Mbps) 400 Input signal BLVDS, LVDS, LVPECL Output signal CMOS Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver Protocols BLVDS, LVDS, LVPECL Number of transmitters 0 Number of receivers 1 Signaling rate (Mbps) 400 Input signal BLVDS, LVDS, LVPECL Output signal CMOS Rating Catalog Operating temperature range (°C) -40 to 85
SOT-23 (DBV) 5 8.12 mm² (2.9 mm × 2.8 mm)
  • Compatible with ANSI TIA/EIA-644-A Standard
  • >400 Mbps (200 MHz) switching rates
  • 100 ps differential skew (typical)
  • 3.5 ns maximum propagation delay
  • Integrated line termination resistor (102Ω typical)
  • Single 3.3V power supply design (2.7V to 3.6V range)
  • Power down high impedance on LVDS inputs
  • Accepts small swing (350 mV typical) differential signal levels
  • LVDS receiver inputs accept LVDS/BLVDS/LVPECL inputs
  • Supports open, short and terminated input fail-safe
  • Pinout simplifies PCB layout
  • Low Power Dissipation (10mW typical@ 3.3V static)
  • SOT-23 5-lead package
  • Leadless WSON-8 package (3x3 mm body size)
  • Electrically similar to the DS90LV018A
  • Fabricated with advanced CMOS process technology
  • Industrial temperature operating range (−40°C to +85°C)
  • Compatible with ANSI TIA/EIA-644-A Standard
  • >400 Mbps (200 MHz) switching rates
  • 100 ps differential skew (typical)
  • 3.5 ns maximum propagation delay
  • Integrated line termination resistor (102Ω typical)
  • Single 3.3V power supply design (2.7V to 3.6V range)
  • Power down high impedance on LVDS inputs
  • Accepts small swing (350 mV typical) differential signal levels
  • LVDS receiver inputs accept LVDS/BLVDS/LVPECL inputs
  • Supports open, short and terminated input fail-safe
  • Pinout simplifies PCB layout
  • Low Power Dissipation (10mW typical@ 3.3V static)
  • SOT-23 5-lead package
  • Leadless WSON-8 package (3x3 mm body size)
  • Electrically similar to the DS90LV018A
  • Fabricated with advanced CMOS process technology
  • Industrial temperature operating range (−40°C to +85°C)

The DS90LV012A and DS90LT012A are single CMOS differential line receivers designed for applications requiring ultra low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Swing (LVDS) technology

The DS90LV012A and DS90LT012A accept low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receivers also support open, shorted, and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV012A has a pinout designed for easy PCB layout. The DS90LT012A includes an input line termination resistor for point-to-point applications.

The DS90LV012A and DS90LT012A, and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed interface applications.

The DS90LV012A and DS90LT012A are single CMOS differential line receivers designed for applications requiring ultra low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Swing (LVDS) technology

The DS90LV012A and DS90LT012A accept low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receivers also support open, shorted, and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DS90LV012A has a pinout designed for easy PCB layout. The DS90LT012A includes an input line termination resistor for point-to-point applications.

The DS90LV012A and DS90LT012A, and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed interface applications.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 DS90LV012A / DS90LT012A 3-V LVDS Single CMOS Differential Line Receiver datasheet (Rev. E) PDF | HTML 2024/3/1
應用說明 Debugging Methodology for DisplayPort/Embedded DisplayPort Link Training Utilizing the Auxiliary Channel PDF | HTML 2026/3/6
應用說明 Applications of Low-Voltage Differential Signaling (LVDS) in LED Walls 2020/10/29
應用說明 Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners 2019/6/29
Application brief LVDS to Improve EMC in Motor Drives 2018/9/27
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018/8/3
Application brief How to Terminate LVDS Connections with DC and AC Coupling 2018/5/16
應用說明 An Overview of LVDS Technology 1998/10/5

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開發板

DS90LV011-12AEVM — 單通道 LVDS 驅動器和接收器評估模組

DS90LV011-12AEVM 評估模組專為德州儀器 DS90LV011A 3-V LVDS 差動線路驅動器和 DS90LV012A 3-V LVDS 差動線路接收器的性能與功能評估而設計。使用者可運用此套件快速評估 DS90LV011A 和 DS90LV012A 支援的輸出波形特性和訊號完整性。接頭針腳可連接至 DS90LV011A 和 DS90LV012A 輸入及輸出,也便於連接至實驗室設備或使用者系統,以進行性能評估。

使用指南: PDF
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開發板

DSLVDS1001-1002EVM — 單通道 LVDS 驅動器和接收器評估模組

DSLVDS1001-1002EVM 是一個評估模組,專為德州儀器 DSLVDS1001 3.3-V LVDS 差動線路驅動器和 DSLVDS1002 3.3-V LVDS 差動線路接收器的性能和功能評估而設計。使用者可利用此套件快速評估 DSLVDS1001 和 DSLVDS1002 接頭針腳支援的輸出波形特性和訊號完整性。利用接頭針腳,可存取 DSLVDS1001 和 DSLVDS1002 輸入和輸出,並協助連接實驗室設備或使用者系統以進行性能評估。
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模擬型號

DS90LV012A IBIS Model

SNLM048.ZIP (23 KB) - IBIS 模型
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOT-23 (DBV) 5 Ultra Librarian

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