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SN74LVC1G11

ACTIVE

1-ch, 3-input 1.65-V to 5.5-V 32 mA drive strength AND gate

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Data sheet

SN74LVC1G11

ACTIVE
Data sheet Order now

Product details

Technology family LVC Number of channels 1 Inputs per channel 3 IOL (max) (mA) 32 IOH (max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 1 Inputs per channel 3 IOL (max) (mA) 32 IOH (max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 125
DSBGA (YZP) 6 2.1875 mm² (— mm × — mm) SOT-23 (DBV) 6 8.12 mm² (2.9 mm × 2.8 mm) X2SON (DSF) 6 1 mm² (1 mm × 1 mm) USON (DRY) 6 1.45 mm² (1.45 mm × 1 mm) SOT-SC70 (DCK) 6 4.2 mm² (2 mm × 2.1 mm)
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • ±2000V human-body model (A114-A)
    • ±1000V charged-device model (C101)
  • Available in the Texas Instruments NanoFree™ package
  • Supports 5V VCC operation
  • Inputs accept voltages to 5.5V
  • Maximum tpd of 4.1ns at 3.3V
  • Low power consumption, 10µA maximum ICC
  • ±24mA output drive at 3.3V
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • ±2000V human-body model (A114-A)
    • ±1000V charged-device model (C101)
  • Available in the Texas Instruments NanoFree™ package
  • Supports 5V VCC operation
  • Inputs accept voltages to 5.5V
  • Maximum tpd of 4.1ns at 3.3V
  • Low power consumption, 10µA maximum ICC
  • ±24mA output drive at 3.3V
  • Ioff supports partial-power-down mode operation

The SN74LVC1G11 performs the Boolean function Y = A • B • C or Y = /A + /B + /C in positive logic.

NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The SN74LVC1G11 performs the Boolean function Y = A • B • C or Y = /A + /B + /C in positive logic.

NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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Technical documentation

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* Data sheet SN74LVC1G11 Single 3-Input Positive-AND Gate datasheet (Rev. I) PDF | HTML Nov 7, 2024

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Package Pins CAD symbols, footprints & 3D models
DSBGA (YZP) 6 Ultra Librarian
SOT-23 (DBV) 6 Ultra Librarian
X2SON (DSF) 6 Ultra Librarian
USON (DRY) 6 Ultra Librarian
SOT-SC70 (DCK) 6 Ultra Librarian
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