LMK3H2104
- Integrated BAW resonator
- No need for external XTAL/XO
- Flexible output frequency
- 2 fraction output dividers (FOD), individual channel dividers
- Up to 400MHz output frequency
- Flexible output format
- 1.2/1.8/2.5/3.3V LVCMOS
- DC- or AC-coupled LVDS
- LP-HCSL with programmable swing. LVPECL, CML and other formats can be derived from LP-HCSL
- Very low jitter
- 61fs max PCIe Gen 5 CC with SSC jitter
- 36.4fs max PCIe Gen 6 CC with SSC jitter
- 25.5fs max PCIe Gen 7 CC with SSC jitter
- PCIe Gen 1 to Gen 7 compliant
- Configurable SSC
- Programmable -0.05% to -3% down spread and ±0.025% to ±1.5% center spread, or preset -0.1%, -0.25%, -0.3% and -0.5% down spread
- 1 input (LMK3H2104) that can be bypassed to any output
- 5ms max startup time
- Fail-safe input pins can be pulled high when device power is off
- Flexible power supply
- Each VDD pin can be independently connected to = 1.8, 2.5 or 3.3V
- Each VDDO pin can be independently connected set to 1.8, 2.5 or 3.3V
- -40 to 105°C ambient temperature
LMK3H2104 is a BAW-based clock generator that does not require any external XTAL or XO. The device can be used as PCIe clock generator or general purpose clock generator. The 2 FODs (Fractional Output Divider) provide frequency flexibility, low power and low jitter at the same time.
LMK3H2104 has up to 4 differential outputs plus 2 LVCMOS outputs or up to 10 LVCMOS outputs. The device also has one clock input. The clock input provides clock multiplexing and buffering ability. Each output bank can independently select any clock source.
The GPI and GPIO pins provide additional control flexibility. These pins can be configured as individual OE, grouped OE, I2C address selection, OTP page selection, PWRGD/PWRDN#, status output and other functions.
The device supports one-time programmable (OTP) non-volatile memory which can be customized and factory preprogrammed.
技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | LMK3H2104 4-Output PCIe Gen 1-7 Compliant Low jitter General Purpose BAW Clock Generator 数据表 | PDF | HTML | 2025年 8月 28日 | ||
用户指南 | LMK3H2104 Register Map | PDF | HTML | 2025年 8月 21日 | |||
证书 | LMK3H2104EVM EU Declaration of Conformity (DoC) | 2025年 7月 22日 |
设计和开发
如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。
LMK3H2108-GUI — Programming GUI for the public release of the LMK3H2108 devices.
支持的产品和硬件
PLLATINUMSIM-SW — PLLatinum Sim Tool
PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
支持的产品和硬件
产品
时钟缓冲器
时钟发生器
时钟抖动清除器
振荡器
硬件开发
评估板
软件
支持软件
PSPICE-FOR-TI — PSpice® for TI 设计和仿真工具
借助 PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短产品上市时间并降低开发成本。
在 PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
封装 | 引脚 | CAD 符号、封装和 3D 模型 |
---|---|---|
VQFN (RGE) | 24 | Ultra Librarian |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
- 制造厂地点
- 封装厂地点
推荐产品可能包含与 TI 此产品相关的参数、评估模块或参考设计。