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LMK5B12212

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Ultra-low-jitter, 12-output, one DPLL, two APLL network synchronizer with integrated 2.5-GHz BAW VCO

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Data sheet

LMK5B12212

ACTIVE
Data sheet Order now

Product details

Function Clock network synchronizer Number of outputs 12 RMS jitter (fs) 47 Output frequency (min) (MHz) 0.000000000001 Output frequency (max) (MHz) 1250 Input type HCSL, LVCMOS, LVDS, LVPECL, XTAL Output type CML, LVCMOS, LVDS, LVPECL Supply voltage (min) (V) 3.135 Supply voltage (max) (V) 3.465 Features JESD204B Rating Catalog Operating temperature range (°C) -40 to 85 Number of input channels 2
Function Clock network synchronizer Number of outputs 12 RMS jitter (fs) 47 Output frequency (min) (MHz) 0.000000000001 Output frequency (max) (MHz) 1250 Input type HCSL, LVCMOS, LVDS, LVPECL, XTAL Output type CML, LVCMOS, LVDS, LVPECL Supply voltage (min) (V) 3.135 Supply voltage (max) (V) 3.465 Features JESD204B Rating Catalog Operating temperature range (°C) -40 to 85 Number of input channels 2
VQFN (RGC) 64 81 mm² 9 x 9
  • Ultra-low jitter BAW VCO based Ethernet clocks
    • 13fs typical RMS jitter at 625MHz with 4MHz 1st order high-pass filter (HPF)
    • 24fs typical RMS jitter at 312.5MHz with 4MHz 1st order HPF
    • 42fs typical/ 60fs maximum RMS jitter at 312.5MHz
    • 47fs typical/ 65fs maximum RMS jitter at 156.25MHz

  • 1 high-performance Digital Phase Locked Loop (DPLL) with 2 Analog Phase Locked Loops (APLLs)

    • Programmable DPLL loop filter bandwidth from 1mHz to 4kHz
    • < 1ppt DCO frequency adjustment step size
  • 2 differential or single-ended DPLL inputs
    • 1Hz (1PPS) to 800MHz input frequency
    • Digital Holdover and Hitless Switching
  • 12 differential outputs with programmable HSDS, AC-LVPECL, LVDS and HSCL formats
    • Up to 16 total frequency outputs when configured with 6 LVCMOS frequency outputs on OUT0_P/N, OUT1_P/N, GPIO1 and GPIO2 and 10 differential outputs on OUT2_P/N to OUT11_P/N
    • 1Hz (1PPS) to 1250MHz output frequency with programmable swing and common mode
    • PCIe Gen 1 to 6 compliant
  • I2C or 3-wire/4-wire SPI
  • Ultra-low jitter BAW VCO based Ethernet clocks
    • 13fs typical RMS jitter at 625MHz with 4MHz 1st order high-pass filter (HPF)
    • 24fs typical RMS jitter at 312.5MHz with 4MHz 1st order HPF
    • 42fs typical/ 60fs maximum RMS jitter at 312.5MHz
    • 47fs typical/ 65fs maximum RMS jitter at 156.25MHz

  • 1 high-performance Digital Phase Locked Loop (DPLL) with 2 Analog Phase Locked Loops (APLLs)

    • Programmable DPLL loop filter bandwidth from 1mHz to 4kHz
    • < 1ppt DCO frequency adjustment step size
  • 2 differential or single-ended DPLL inputs
    • 1Hz (1PPS) to 800MHz input frequency
    • Digital Holdover and Hitless Switching
  • 12 differential outputs with programmable HSDS, AC-LVPECL, LVDS and HSCL formats
    • Up to 16 total frequency outputs when configured with 6 LVCMOS frequency outputs on OUT0_P/N, OUT1_P/N, GPIO1 and GPIO2 and 10 differential outputs on OUT2_P/N to OUT11_P/N
    • 1Hz (1PPS) to 1250MHz output frequency with programmable swing and common mode
    • PCIe Gen 1 to 6 compliant
  • I2C or 3-wire/4-wire SPI

The LMK5B12212 is a high-performance network synchronizer and jitter cleaner designed to meet the stringent requirements of ethernet-based networking applications with < 5ns timing accuracy (class D).

The network synchronizer integrates a DPLL to provide hitless switching and jitter attenuation with programmable loop bandwidth (LBW) and no external loop filters, maximizing flexibility and ease of use. The DPLL phase locks an integrated APLL to the provided reference input.

APLL1 features an ultra high performance PLL with TI’s proprietary Bulk Acoustic Wave (BAW) technology (known as the BAW APLL) and can generate 312.5MHz output clocks with 42fs typical / 60fs maximum RMS jitter irrespective of the DPLL reference input frequency and jitter characteristics. APLL2 provides for a second frequency and/or synchronization domain.

Reference validation circuitry monitors the DPLL reference clocks and performs a hitless switch between inputs upon detecting a switchover event. Zero-Delay Mode (ZDM) and phase cancellation can be enabled to control the phase relationship from input to outputs.

The device is fully programmable through I2C or SPI. The integrated EEPROM can be used to customize system start-up clocks. The device also features factory default ROM profiles as fallback options.

The LMK5B12212 is a high-performance network synchronizer and jitter cleaner designed to meet the stringent requirements of ethernet-based networking applications with < 5ns timing accuracy (class D).

The network synchronizer integrates a DPLL to provide hitless switching and jitter attenuation with programmable loop bandwidth (LBW) and no external loop filters, maximizing flexibility and ease of use. The DPLL phase locks an integrated APLL to the provided reference input.

APLL1 features an ultra high performance PLL with TI’s proprietary Bulk Acoustic Wave (BAW) technology (known as the BAW APLL) and can generate 312.5MHz output clocks with 42fs typical / 60fs maximum RMS jitter irrespective of the DPLL reference input frequency and jitter characteristics. APLL2 provides for a second frequency and/or synchronization domain.

Reference validation circuitry monitors the DPLL reference clocks and performs a hitless switch between inputs upon detecting a switchover event. Zero-Delay Mode (ZDM) and phase cancellation can be enabled to control the phase relationship from input to outputs.

The device is fully programmable through I2C or SPI. The integrated EEPROM can be used to customize system start-up clocks. The device also features factory default ROM profiles as fallback options.
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Type Title Date
* Data sheet LMK5B12212 1-DPLL 2-APLL 2-IN 12-OUT Network Synchronizer With BAW VCO for Ethernet-Based Networking Applications datasheet PDF | HTML 21 Nov 2024
EVM User's guide LMK5B12212 Evaluation Module User's Guide PDF | HTML 18 Jul 2025
User guide LMK5B12212 Programmer's Guide PDF | HTML 24 Apr 2025
Certificate LMK5B12212EVM EU Declaration of Conformity (DoC) 29 Sep 2023

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

LMK5B12212EVM — LMK5B12212 evaluation module

The LMK5B12212 evaluation module (EVM) is for the LMK5B12212 network clock generator and synchronizer. The EVM can be used for device evaluation, compliance testing and system prototyping.  The LMK5B12212 integrates three analog PLLs (APLL) and three digital PLLs (DPLL) with programmable loop (...)

User guide: PDF | HTML
Not available on TI.com
Support software

TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices

Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.

Supported products & hardware

Supported products & hardware

Products
Clock generators
CDCE6214-Q1 — Ultra-low power clock generator supporting PCIe gen 1-5 with 2 inputs, 4 outputs and internal EEPROM CDCI6214 — PCIe Gen4 support ultra-low power clock generator with four programmable outputs & EEPROM LMK02000 — 1 to 800-MHz, precision clock distributor with integrated PLL and 3 LVDS / 5 LVPECL outputs LMK02002 — 1 to 800-MHz, precision clock distributor with integrated PLL and 4 LVPECL outputs LMK03200 — Precision 0-delay clock conditioner with integrated VCO LMK03318 — Ultra-low jitter clock generator family with single PLL LMK03328 — Ultra-low jitter clock generator family with two independent PLLs LMK03806 — Ultra-low jitter clock generator with 14 outputs LMK3H0102 — Bulk acoustic wave (BAW)-based PCIe Gen 1 to Gen 7-compliant referenceless clock generator
Clock buffers
CDCDB2000 — DB2000QL compliant 20-output clock buffer for PCIe® Gen 1 to Gen 5 CDCDB800 — 8-output clock buffer for PCIe® Gen 1 to Gen 6 LMK01000 — 1.6-GHz high performance clock buffer, divider, and distributor with 3 LVDS & 5 LVPECL outputs LMK01010 — 1.6-GHz high performance clock buffer, divider, and distributor with 8 LVDS outputs LMK01020 — 1.6-GHz high performance clock buffer, divider, and distributor with 8 LVPECL outputs LMK01801 — Dual clock distribution LMK1D1208I — 8-channel output, 1.8-V, 2.5-V, and 3.3-V LVDS buffer with I²C LMKDB1104 — 4-output LP-HCSL clock buffer for PCIe Gen 1 to Gen 7 LMKDB1108 — 8-output LP-HCSL clock buffer for PCIe Gen 1 to Gen 7 LMKDB1120 — DB2000QL-compliant 20-output clock buffer for PCIe Gen 1 to Gen 7 LMKDB1204 — 2-input 4-output LP-HCSL clock multiplexer for PCIe Gen 1 to Gen 7
Oscillators
LMK61E0M — LVCMOS ultra-low jitter programmable oscillator with internal EEPROM LMK61E2 — Ultra-low jitter, EEPROM programmable oscillator for medical imaging and test and measurement
Clock jitter cleaners
LMK04100 — Precision clock conditioners clock jitter cleaner with cascaded PLLs LMK04101 — Jitter cleaner with integrated 1430 to 1570-MHz VCO:3 outputs for 2VPEC/LVPEC+4 outputs for LVCOMS LMK04102 — Jitter cleaner with integrated 1600 to 1750-MHz VCO:3 outputs for 2VPEC/LVPEC+4 outputs for LVCOMS LMK04110 — Jitter cleaner with integrated 1185 to 1296-MHz VCO:5 outputs for 2VPEC/LVPEC LMK04111 — Jitter cleaner with integrated 1430 to 1570-MHz VCO:5 outputs for 2VPEC/LVPEC LMK04131 — Jitter cleaner with integrated 1430 to 1570-MHz VCO:2 outputs for 2VPEC/LVPEC+LVDS+LVCOMS LMK04133 — Jitter cleaner with integrated 1840 to 2160-MHz VCO:2 outputs for 2VPEC/LVPEC+LVDS+LVCOMS LMK04208 — Ultra low-noise clock jitter cleaner with 6 programmable outputs LMK04228 — Ultra low-noise clock jitter cleaner with dual loop PLLs LMK04368-EP — Enhanced product ultra-low-noise 3.2-GHz JESD204C jitter cleaner LMK04610 — Ultra low-noise and low power JESD204B compliant clock jitter cleaner with dual PLLs LMK04616 — Ultra low-noise and low power JESD204B compliant clock jitter cleaner LMK04714-Q1 — Automotive, ultra low-noise 3.2-GHz, JESD204B and JESD204C dual-loop clock jitter cleaner LMK04803 — Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 1.9-GHz VCO LMK04816 — Three input low-noise clock jitter cleaner with dual loop PLLs LMK04821 — Ultra low jitter synthesizer and jitter cleaner with JESD204B support LMK04826 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 1840 to1970-MHz VCO0 LMK04828 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0. LMK04828-EP — Ultra low-noise JESD204B compliant clock jitter cleaner with temperature range -55 to 105c LMK04832 — Ultra-low-noise, 3.2-GHz, 15-output, JESD204B clock jitter cleaner with dual loop LMK04832-SEP — Radiation-tolerant, 30-krad, ultra-low-noise, 3.2-GHz 15-output JESD204C clock jitter cleaner LMK04832-SP — Radiation-hardened-assured (RHA), ultra-low-noise, 3.2-GHz, 15-output clock jitter cleaner
Clock network synchronizers
LMK05028 — Low-jitter dual-channel network synchronizer clock LMK05318 — Ultra-low jitter single channel network synchronizer clock with BAW LMK05318B — Ultra-low jitter single channel network synchronizer clock with BAW LMK5B12204 — Ultra-low jitter clock generator with network synchronization and BAW technology LMK5B12212 — Ultra-low-jitter, 12-output, one DPLL, two APLL network synchronizer with integrated 2.5-GHz BAW VCO LMK5B33216 — 16-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO LMK5B33414 — 14-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO LMK5C22212A — Three DPLL, two APLL, two-input and 12-output network synchronizer with BAW VCO  LMK5C33216 — Ultra-low jitter clock synchronizer with JESD204B for wireless communications with BAW LMK5C33216A — Three DPLL, three APLL, two-input and 16-output network synchronizer with JESD204B/C and BAW VCO
RF PLLs & synthesizers
LMX1204 — 12.8-GHz RF buffer, multiplier and divider with JESD204B/C SYSREF support and phase synchronization LMX1214 — 1:5 18GHz RF buffer and divider with auxiliary clock LMX1860-SEP — Rad tolerant 15GHz RF buffer, multiplier, divider with SYSREF (JESD204B/C support) and FPGA clock LMX1906-SP — Radiation-hardness-assured (RHA) 15GHz buffer, multiplier and divider with SYSREF and FPGA clock LMX2485 — 500-MHz to 3-GHz delta-sigma low power dual PLL for RF personal communications LMX2485E — 50-MHz to 3-GHz delta-sigma low power dual PLL for RF personal communications LMX2485Q-Q1 — 500MHz to 3GHz automotive delta-sigma low power dual PLL LMX2486 — 1-GHz to 4.5-GHz delta-sigma low power dual PLL for RF personal communications LMX2487 — 1 to 6-GHz delta-sigma low power dual PLLatinum frequency synthesizer with 3.0-GHz integer PLL LMX2487E — 3-GHz to 7.5-GHz delta-sigma low power dual PLL for RF personal communications LMX2491 — 6.4-GHz low noise fractional-N PLL with ramp/chirp generation LMX2492 — 500MHz to 14GHz wideband, low noise fractional-N PLL with ramp/chirp generation LMX2492-Q1 — Automotive grade 500-MHz to 14-GHz wideband, low noise fractional-N PLL with ramp/chirp generation LMX2531 — High performance frequency synthesizer system with integrated VCO LMX2541 — Ultra-low noise PLLatinum frequency synthesizer with integrated VCO LMX2571 — 1.34-GHz, low-power, extreme-temperature RF synthesizer with frequency-shift keying (FSK) modulation LMX2571-EP — Enhanced-product, 1.34-GHz, low-power, extreme-temperature RF synthesizer with FSK modulation LMX2572 — 6.4-GHz low-power wideband RF synthesizer LMX2572LP — 2-GHz low power wideband RF synthesizer with FSK modulation LMX2581 — 3.76-GHz wideband frequency synthesizer with integrated VCO LMX2581E — 3.8-GHz wideband frequency synthesizer with integrated VCO LMX2582 — 5.5-GHz high performance, wideband PLLatinum RF synthesizer LMX2592 — 9.8-GHz wideband frequency synthesizer with integrated VCO LMX2594 — 15-GHz wideband PLLatinum™ RF synthesizer with phase synchronization and JESD204B support LMX2595 — 20-GHz wideband RF synthesizer with phase synchronization & JESD204B support LMX2820 — 22.6-GHz wideband RF synthesizer with phase synchronization, JESD and <5-µs frequency calibration LMX1205 — Low-noise, high-frequency buffer/multiplier/divider with JESD204 support and prog. clock delays LMX2624-SP — 5MHz to 28GHz space-grade wideband synthesizer with phase synchronization and JESD204B support
Hardware development
Evaluation board
LMK03806BEVAL — LMK03806B Evaluation Board LMK04208EVM — Two Input, 6+1 Output, Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.9 GHz VCO LMK04616EVM — LMK04616 Evaluation Module LMK04805BEVAL — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.2 GHz VCO LMK04806BEVAL — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.5 GHz VCO LMK04816BEVAL — Three Input, Thirteen Output, Clock Jitter Cleaner with Dual Cascaded PLLs and Integrated 2.5 GHz VC LMK04826BEVM — LMK04826BEVM Evaluation Module LMK04828BEVM — LMK04828 evaluation module LMK04832EVM — LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module LMK04832SEPEVM — LMK04832-SEP evaluation module for ultra-low-noise, 3.2-GHz 15-output clock jitter clea LMK04906BEVAL — Three Input, Seven Output, Clock Jitter Cleaner with Dual Cascaded PLLs and Integrated 2.5 GHz VCO LMK5B33216EVM — LMK5B33216 evaluation module for 16-output, three DPLL and APLL, network synchronizer with BAW VCO LMX2571EPEVM — LMX2571-EP evaluation module for 1.34-GHz, low-power, extreme-temperature RF synthesizer LMX2582EVM — LMX2582EVM High Performance, Wideband Frequency PLLatinum RF Synthesizer With Integrated VCO LMX2592EVM — LMX2592EVM high-performance, wideband frequency RF synthesizer PLLATINUM™ integrated circuit LMX2594PSEVM — LMX2594 evaluation module for 15-GHz RF synthesizer with multiple-device phase synchronization XMICR-3P-LMX2492 — LMX2492 X-MWblock evaluation modules XMICR-3P-LMX2572 — LMX2572 X-MWblock evaluation modules XMICR-3P-LMX2592 — LMX2592 X-MWblock evaluation modules XMICR-3P-LMX2594 — LMX2594 X-MWblock evaluation modules XMICR-3P-LMX2595 — LMX2595 X-MWblock evaluation modules LMK04832EVM-CVAL — LMK04832-SP evaluation module for ultra-low-noise, dual-loop, JESD204B clock jitter cleaner LMK04368EPEVM — LMK04368-EP evaluation module for JESD204B/C dual-loop clock jitter cleaner LMK61E0MEVM — LMK61E0M Ultra-Low-Jitter Programmabler Oscillator Evaluation Module LMK61E2EVM — LMK61E2EVM Ultra-Low-Jitter Programmable Oscillator Evaluation Module LMX1204EVM — LMX1204 evaluation module for RF buffer, multiplier and divider with JESD204B/C SYSREF support LMX2594EVM — LMX2594EVM 15-GHz wideband RF synthesizer with phase synchronization & JESD204B evaluation module LMX2595EVM — 20-GHz Wideband RF Synthesizer With Phase Synchronization and JESD204B Evaluation Module LMX2615EVM-CVAL — Space grade synthesizer evaluation module LMX2694EPEVM — 15-GHz wideband RF synthesizer evaluation module LMX2572EVM — 6.4-GHz Low Power Wideband RF Synthesizer with Phase Synchronization and JESD204B Support LMX2572LPEVM — 2-GHz Low Power Wideband RF Synthesizer with FSK Modulation Evaluation Module LMX2581EVM — LMX2581 evaluation module LMX2820EVM — LMX2820 22.6-GHz wideband RF synthesizer evaluation module LMX8410LEVM — I/Q demodulator evaluation module LMK5B12212EVM — LMK5B12212 evaluation module LMK5B33414EVM — LMK5B33414 evaluation module for 14-output, three DPLL and APLL, network synchronizer with BAW VCO LMK5C33216AEVM — LMK5C33216A evaluation module LMK5C33216EVM — LMK5C33216 clock synchronizer DPLL 2 input 16 outputs evaluation module LMK5C33414AEVM — LMK5C33414A evaluation module LMK05028EVM — LMK05028 Network Clock Generator and Synchronizer Evaluation Module LMK05318BEVM — Network synchronizer clock evaluation module CDCI6214EVM — CDCI6214 Ultra-Low Power Clock Generator Evaluation Module CDCE6214-Q1EVM — 4 differential and 1 LVCMOS outputs clock generator evaluation module LMK3H0102EVM — LMK3H0102 evaluation module
Software
IDE, configuration, compiler or debugger
CODELOADER — CodeLoader Software for device register programming
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Simulation model

LMK5B33216 Family IBIS model

SNAM295.ZIP (239 KB) - IBIS Model
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Design tool

CLOCK-PERFDATA-DESIGN — Clock performance data and register settings for clock generators, network synchronizers, jitter cleaners, and other clocking devices.

Configuration, raw phase noise data, noise plots, and register data for common use cases on clock generators, network synchronizers, jitter cleaners, and other clocking devices
Supported products & hardware

Supported products & hardware

Products
Clock network synchronizers
LMK5B33216 — 16-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO LMK5B33414 — 14-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO LMK5C33414AS1 — Three DPLL, three APLL, four-input and 14-output network synchronizer with BAW VCO IEEE-1588 support LMK5C33414A — Three DPLL, three APLL, four-input and 14-output network synchronizer with JESD204B/C and BAW VCO LMK5C33216A — Three DPLL, three APLL, two-input and 16-output network synchronizer with JESD204B/C and BAW VCO LMK5C33216AS1 — Three DPLL, three APLL, two-input and 16-output network synchronizer with BAW VCO IEEE-1588 support LMK5B12212 — Ultra-low-jitter, 12-output, one DPLL, two APLL network synchronizer with integrated 2.5-GHz BAW VCO LMK5C22212A — Three DPLL, two APLL, two-input and 12-output network synchronizer with BAW VCO  LMK5C22212AS1 — Three DPLL, two APLL, two-input, 12-output network synchronizer with BAW VCO and IEEE-1588 support
Software
Application software & framework
TICSPRO-SW — Texas Instruments Clocks and Synthesizers (TICS) Pro Software
Download options
Schematic

400G and 800G Network Switch Reference Design (Rev. A)

SNAR047A.PDF (4687 KB)
Download
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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VQFN (RGC) 64 Ultra Librarian
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