UC1707-SP
- Rad-Tolerant: 50 kRad (Si) for 5962-
8761903VEA, 5962-8761903VFA(1) - QML-V Qualified, SMD
(5962-8761901VEA, 5962-8761903VEA,
5962-8761903VFA, 5962-8761901V2A) - Two Independent Drivers
- 1.5-A Totem Pole Outputs
- Inverting and Non-Inverting Inputs
- 40-ns Rise and Fall Into 1000 pF
- High-Speed, Power MOSFET Compatible
- Low Cross-Conduction Current Spike
- Analog Shutdown With Optional Latch
- Low Quiescent Current
- 5-V to 40-V Operation
- Thermal Shutdown Protection
- 16-Pin Dual-In-Line Package
The UC1707-SP power driver is made with a high-speed Schottky process to interface between low-level control functions and high-power switching devices – particularly power MOSFETs. The UC1707-SP contains two independent channels, each of which can be activated by either a high or low input logic level signal. Each output can source or sink up to 1.5 A as long as power dissipation limits are not exceeded.
Although each output can be activated independently with its own inputs, it can be forced low in common through the action either of a digital high signal at the Shutdown terminal or a differential low-level analog signal. The Shutdown command from either source can either be latching or not, depending on the status of the Latch Disable pin.
Supply voltage for both VIN and VC can independently range from 5 to 40 V.
您可能感兴趣的相似产品
功能与比较器件相同,但引脚排列有所不同
功能与比较器件相似
技术文档
设计和开发
如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。
PSPICE-FOR-TI — PSpice® for TI 设计和仿真工具
借助 PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短产品上市时间并降低开发成本。
在 PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
封装 | 引脚 | CAD 符号、封装和 3D 模型 |
---|---|---|
CDIP (J) | 16 | Ultra Librarian |
CFP (W) | 16 | Ultra Librarian |
LCCC (FK) | 20 | Ultra Librarian |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
- 制造厂地点
- 封装厂地点
推荐产品可能包含与 TI 此产品相关的参数、评估模块或参考设计。