The TUSB2046x is a 3.3-V CMOS hub device that provides one upstream port and four
downstream ports in compliance with the Universal Serial Bus (USB) specification as a full-speed
hub. Because this device is implemented with a digital state machine instead of a microcontroller,
no firmware
programming is required. Fully compliant USB transceivers are integrated into the ASIC for
all upstream and downstream ports. The downstream ports support full-speed and low-speed devices by
automatically setting the slew rate according to the speed of the device attached to the ports. The
configuration of the BUSPWR pin selects either the bus-powered or the self-powered mode.
Configuring the GANGED input determines the power switching and overcurrent detection
modes for the downstream ports. If GANGED is high, all PWRON outputs switch
together and if any OVRCUR is activated, all ports transition to the
power-off state. If GANGED is low, the PWRON outputs and
OVRCUR inputs operate on a per-port basis.
The TUSB2046x provides the flexibility of using a 6-MHz or a 48-MHz clock. The logic
level of the TSTMODE terminal controls the selection of the clock source. When TSTMODE is low, the
output of the internal APLL circuitry is selected to drive the internal core of the device. When
TSTMODE is high, the TSTPLL/48MCLK input is selected as the input clock source and the APLL
circuitry is powered down and bypassed. The internal oscillator cell is also powered down while
TSTMODE is high. Low EMI emission is achieved because the TUSB2046x can usee a 6-MHz crystal input.
Connect the crystal as shown in
Figure 6. An internal PLL then
generates the 48-MHz clock used to sample data from the upstream port and to synchronize the 12 MHz
used for the USB clock. If low-power suspend and resume are desired, a passive crystal or resonator
must be used. However, a 6-MHz oscillator may be used by connecting the output to the XTAL1 pin and
leaving the XTAL2 pin open. The oscillator TTL output must not exceed 3.6 V.
For 48-MHz operation, the clock cannot be generated with a crystal using the XTAL2 output
because the internal oscillator cell supports only the fundamental frequency. Other useful features
of the TUSB2046x include a package with a 0.8-mm pin pitch for easy PCB routing and assembly,
push-pull outputs for the PWRON pins eliminate the need for pullup resistors
required by traditional open-collector I/Os, and OVRCUR pins have noise
filtering for increased immunity to voltage spikes.
The TUSB2046x is a 3.3-V CMOS hub device that provides one upstream port and four
downstream ports in compliance with the Universal Serial Bus (USB) specification as a full-speed
hub. Because this device is implemented with a digital state machine instead of a microcontroller,
no firmware
programming is required. Fully compliant USB transceivers are integrated into the ASIC for
all upstream and downstream ports. The downstream ports support full-speed and low-speed devices by
automatically setting the slew rate according to the speed of the device attached to the ports. The
configuration of the BUSPWR pin selects either the bus-powered or the self-powered mode.
Configuring the GANGED input determines the power switching and overcurrent detection
modes for the downstream ports. If GANGED is high, all PWRON outputs switch
together and if any OVRCUR is activated, all ports transition to the
power-off state. If GANGED is low, the PWRON outputs and
OVRCUR inputs operate on a per-port basis.
The TUSB2046x provides the flexibility of using a 6-MHz or a 48-MHz clock. The logic
level of the TSTMODE terminal controls the selection of the clock source. When TSTMODE is low, the
output of the internal APLL circuitry is selected to drive the internal core of the device. When
TSTMODE is high, the TSTPLL/48MCLK input is selected as the input clock source and the APLL
circuitry is powered down and bypassed. The internal oscillator cell is also powered down while
TSTMODE is high. Low EMI emission is achieved because the TUSB2046x can usee a 6-MHz crystal input.
Connect the crystal as shown in
Figure 6. An internal PLL then
generates the 48-MHz clock used to sample data from the upstream port and to synchronize the 12 MHz
used for the USB clock. If low-power suspend and resume are desired, a passive crystal or resonator
must be used. However, a 6-MHz oscillator may be used by connecting the output to the XTAL1 pin and
leaving the XTAL2 pin open. The oscillator TTL output must not exceed 3.6 V.
For 48-MHz operation, the clock cannot be generated with a crystal using the XTAL2 output
because the internal oscillator cell supports only the fundamental frequency. Other useful features
of the TUSB2046x include a package with a 0.8-mm pin pitch for easy PCB routing and assembly,
push-pull outputs for the PWRON pins eliminate the need for pullup resistors
required by traditional open-collector I/Os, and OVRCUR pins have noise
filtering for increased immunity to voltage spikes.