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TLV710-Q1

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Automotive 200-mA, high-PSRR, dual-channel low-dropout voltage regulator with enable

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Data sheet

TLV710-Q1

ACTIVE
Data sheet Order now

Product details

Rating Automotive Vin (max) (V) 5.5 Vin (min) (V) 2 Iout (max) (A) 0.2 Output options Dual output, Fixed Output Vout (max) (V) 2.8 Vout (min) (V) 1.8 Fixed output options (V) 1.8, 2.8, 3.3 Noise (µVrms) 48 PSRR at 100 KHz (dB) 50 Iq (typ) (mA) 0.36 Features Enable Thermal resistance θJA (°C/W) 191 Load capacitance (min) (µF) 0.1 Regulated outputs (#) 2 Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 140 Operating temperature range (°C) -40 to 125
Rating Automotive Vin (max) (V) 5.5 Vin (min) (V) 2 Iout (max) (A) 0.2 Output options Dual output, Fixed Output Vout (max) (V) 2.8 Vout (min) (V) 1.8 Fixed output options (V) 1.8, 2.8, 3.3 Noise (µVrms) 48 PSRR at 100 KHz (dB) 50 Iq (typ) (mA) 0.36 Features Enable Thermal resistance θJA (°C/W) 191 Load capacitance (min) (µF) 0.1 Regulated outputs (#) 2 Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 140 Operating temperature range (°C) -40 to 125
WSON (DSE) 6 2.25 mm² (1.5 mm × 1.5 mm)
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient
      Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C4B
  • Very Low Dropout:
    • 150 mV at IOUT = 200 mA and VOUT = 2.8 V
    • 75 mV at IOUT = 100 mA and VOUT = 2.8 V
    • 40 mV at IOUT = 50 mA and VOUT = 2.8 V
  • 2% Accuracy Over Temperature
  • Low IQ of 35 μA per Regulator
  • Multiple Fixed-Output Voltage Combinations Possible from 1.2 V to 4.8 V
  • High PSRR: 70 dB at 1kHz
  • Stable With Effective Capacitance of 0.1 µF(1)
  • Overcurrent and Thermal Protection
  • Dedicated VREF for Each Output Minimizes Crosstalk
  • Available in 1.5mm × 1.5mm SON-6 Package
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient
      Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C4B
  • Very Low Dropout:
    • 150 mV at IOUT = 200 mA and VOUT = 2.8 V
    • 75 mV at IOUT = 100 mA and VOUT = 2.8 V
    • 40 mV at IOUT = 50 mA and VOUT = 2.8 V
  • 2% Accuracy Over Temperature
  • Low IQ of 35 μA per Regulator
  • Multiple Fixed-Output Voltage Combinations Possible from 1.2 V to 4.8 V
  • High PSRR: 70 dB at 1kHz
  • Stable With Effective Capacitance of 0.1 µF(1)
  • Overcurrent and Thermal Protection
  • Dedicated VREF for Each Output Minimizes Crosstalk
  • Available in 1.5mm × 1.5mm SON-6 Package

The TLV7103318-Q1 and TLV7101828-Q1 family of dual, low-dropout (LDO) linear regulators are low quiescent current devices with excellent line and load transient performance. These LDOs are designed for power-sensitive applications. These devices provide a typical accuracy of 2% over temperature.

The TLV7103318-Q1 and TLV7101828-Q1 family are available in a 1,5-mm × 1,5-mm SON-6 package, and are ideal for handheld applications.

The TLV7103318-Q1 and TLV7101828-Q1 family of dual, low-dropout (LDO) linear regulators are low quiescent current devices with excellent line and load transient performance. These LDOs are designed for power-sensitive applications. These devices provide a typical accuracy of 2% over temperature.

The TLV7103318-Q1 and TLV7101828-Q1 family are available in a 1,5-mm × 1,5-mm SON-6 package, and are ideal for handheld applications.
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Technical documentation

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* Data sheet TLV7103318-Q1 Dual, 200mA, Low-IQ Low-Dropout Regulator for Portable Devices datasheet (Rev. A) Mar 26, 2013
Functional safety information TLV710-Q1 Functional Safety FIT Rate, FMD and Pin FMA PDF | HTML Sep 30, 2024

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Reference design

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This power-supply design describes the optimized power management IC (PMIC) to power the DRA821 processor. The user's guide details the design considerations of a power design for the DRA821 processor using the TPS6594-Q1 PMIC.

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Reference design

TIPA-050036 — J784S4 or J721S2 power-supply design using the TPS6594-Q1 PMIC for automotive applications

This power-supply design describes the optimized power management IC (PMIC) to power the Jacinto J784S4 or J721S2 processors. The user's guide outlines the design considerations of a power design for the Jacinto J784S4 or J721S2 processors using the TPS6594-Q1 PMIC.

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