SN74LVTH16244A

Name: SN74LVTH16244A
Brand: TI
SKU: SN74LVTH16244A
Price: 0.871 USD

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16-ch, 2.7-V to 3.6-V buffers with TTL-compatible CMOS inputs and 3-state outputs

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Data sheet

document-pdfAcrobat 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS, SNx4LVTH16244A datasheet (Rev. U)

SN74LVTH16244A

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Data sheet

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Product details

Technology family

LVT

Supply voltage (min) (V)

2.7

Supply voltage (max) (V)

3.6

Number of channels

16

IOL (max) (mA)

64

Supply current (max) (µA)

5000

IOH (max) (mA)

-32

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Ultra high speed (tpd <5ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Technology family

LVT

Supply voltage (min) (V)

2.7

Supply voltage (max) (V)

3.6

Number of channels

16

IOL (max) (mA)

64

Supply current (max) (µA)

5000

IOH (max) (mA)

-32

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Ultra high speed (tpd <5ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

SSOP (DL)

48

164.358 mm² 15.88 x 10.35

TSSOP (DGG)

48

101.25 mm² 12.5 x 8.1

TVSOP (DGV)

48

62.08 mm² 9.7 x 6.4

Members of the Texas Instruments Widebus Family
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V_CC)
Support Unregulated Battery Operation
Down to 2.7 V
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
I_off and Power-Up 3-State Support Hot
Insertion
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 500 mA
Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)

Members of the Texas Instruments Widebus Family
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V_CC)
Support Unregulated Battery Operation
Down to 2.7 V
Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
I_off and Power-Up 3-State Support Hot
Insertion
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 500 mA
Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)

The 'LVTH16244A devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical active-low output-enable (OE) inputs.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

When V_CC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

The 'LVTH16244A devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical active-low output-enable (OE) inputs.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

When V_CC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

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Top documentation	Type	Title	Format options	Date
*	Data sheet	3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS, SNx4LVTH16244A datasheet (Rev. U)		11 Oct 2013
	Selection guide	Logic Guide (Rev. AC)	PDF \| HTML	13 Nov 2025
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)		26 Jul 2021
	Application note	An Overview of Bus-Hold Circuit and the Applications (Rev. B)		17 Sep 2018
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		02 Dec 2015
	User guide	LOGIC Pocket Data Book (Rev. B)		16 Jan 2007
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		08 Jul 2004
	Application note	TI IBIS File Creation, Validation, and Distribution Processes		29 Aug 2002
	Application note	16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)		22 May 2002
	Application note	Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices		10 May 2002
	Selection guide	Advanced Bus Interface Logic Selection Guide		09 Jan 2001
	Application note	LVT-to-LVTH Conversion		08 Dec 1998
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	Application note	Understanding Advanced Bus-Interface Products Design Guide		01 May 1996