产品详情

Sample rate (max) (Msps) 1600, 3200 Resolution (Bits) 12 Number of input channels 1, 2 Interface type Parallel LVDS Analog input BW (MHz) 2400 Features Ultra High Speed Rating Space Peak-to-peak input voltage range (V) 0.8 Power consumption (typ) (mW) 3880 Architecture Folding Interpolating SNR (dB) 58.2 ENOB (Bits) 9.3 SFDR (dB) 67.3 Operating temperature range (°C) 25 to 25 Input buffer Yes Radiation, TID (typ) (krad) 300 Radiation, SEL (MeV·cm2/mg) 120
Sample rate (max) (Msps) 1600, 3200 Resolution (Bits) 12 Number of input channels 1, 2 Interface type Parallel LVDS Analog input BW (MHz) 2400 Features Ultra High Speed Rating Space Peak-to-peak input voltage range (V) 0.8 Power consumption (typ) (mW) 3880 Architecture Folding Interpolating SNR (dB) 58.2 ENOB (Bits) 9.3 SFDR (dB) 67.3 Operating temperature range (°C) 25 to 25 Input buffer Yes Radiation, TID (typ) (krad) 300 Radiation, SEL (MeV·cm2/mg) 120
CCGA (NAA) 376 780.6436 mm² 27.94 x 27.94
  • Total Ionizing Dose (TID) to 300 krad(Si)
  • Single Event Latch-up (SEL) > 120 MeV-cm2/mg
  • Wide Temperature Range –55°C to +125°C
  • Low Power Consumption
  • R/W SPI for Extended Control Mode or Simple Pin Control Mode
  • Interleaved Timing Automatic with Manual Skew Adjust
  • Auto-Sync Function for Multi-Chip Systems
  • Time Stamp Feature to Capture External Trigger
  • Test Patterns at Output for System Debug
  • 1:1 Non-Demuxed or 1:2 or 1:4 Parallel Demuxed LVDS Outputs
  • Single 1.9V Power Supply
  • 376 CPGA Hermetic Package
  • Total Ionizing Dose (TID) to 300 krad(Si)
  • Single Event Latch-up (SEL) > 120 MeV-cm2/mg
  • Wide Temperature Range –55°C to +125°C
  • Low Power Consumption
  • R/W SPI for Extended Control Mode or Simple Pin Control Mode
  • Interleaved Timing Automatic with Manual Skew Adjust
  • Auto-Sync Function for Multi-Chip Systems
  • Time Stamp Feature to Capture External Trigger
  • Test Patterns at Output for System Debug
  • 1:1 Non-Demuxed or 1:2 or 1:4 Parallel Demuxed LVDS Outputs
  • Single 1.9V Power Supply
  • 376 CPGA Hermetic Package

The ADC12D1600QML is a low power, high performance CMOS analog-to-digital converter that digitizes signals at a 12-bit resolution at sampling rates up to 3.2 GSPS in an interleaved mode. It can also be used as a dual channel ADC for sampling rates up to 1.6 GSPS. For sampling rates below 800 MHz, there is a Low Sampling Power Saving Mode (LSPSM) that reduces power consumption to less than 1.4 W per channel (typical). The ADC can support conversion rates as low as 200 MSPS.

The ADC1600QML provides a flexible parallel LVDS interface which has multiple SPI programmable options to facilitate board design and ASIC/FPGA data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and support programmable common mode voltage. The output of each channel is configurable in either 1:1 non-demuxed or 1:2 demuxed modes. If used as a single channel ADC, there is an option for 1:4 demuxing of the output. The product comes in a hermetic 376 CPGA package for harsh environments.

The ADC12D1600QML is a low power, high performance CMOS analog-to-digital converter that digitizes signals at a 12-bit resolution at sampling rates up to 3.2 GSPS in an interleaved mode. It can also be used as a dual channel ADC for sampling rates up to 1.6 GSPS. For sampling rates below 800 MHz, there is a Low Sampling Power Saving Mode (LSPSM) that reduces power consumption to less than 1.4 W per channel (typical). The ADC can support conversion rates as low as 200 MSPS.

The ADC1600QML provides a flexible parallel LVDS interface which has multiple SPI programmable options to facilitate board design and ASIC/FPGA data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and support programmable common mode voltage. The output of each channel is configurable in either 1:1 non-demuxed or 1:2 demuxed modes. If used as a single channel ADC, there is an option for 1:4 demuxing of the output. The product comes in a hermetic 376 CPGA package for harsh environments.

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类型 标题 下载最新的英语版本 日期
* 数据表 ADC12D1600QML 12-Bit, 3.2/2.0 GSPS RF Sampling ADC 数据表 2012年 12月 17日
* 辐射与可靠性报告 ADC12D1600QML-SP/ADC12D1620QML-SP Single-Event Effects (SEE) Radiation Report 2020年 7月 27日
* 辐射与可靠性报告 Single Event Effects Characterization of Texas Instruments ADC12D1600CCMLS 2018年 6月 14日
* 辐射与可靠性报告 ADC12D1600CCMLS TID Report 2013年 1月 17日
* 辐射与可靠性报告 Analysis of Low Dose Rate Effects on Parasitic Bipolar Structures in CMOS Proces 2012年 5月 4日
选择指南 TI Space Products (Rev. K) 2025年 4月 4日
更多文献资料 TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B) 2025年 2月 20日
应用简报 经 DLA 批准的 QML 产品优化 (Rev. B) PDF | HTML 英语版 (Rev.B) PDF | HTML 2024年 10月 28日
应用手册 单粒子效应置信区间计算 (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2022年 12月 2日
应用手册 重离子轨道环境单粒子效应估算 (Rev. A) PDF | HTML 英语版 (Rev.A) PDF | HTML 2022年 11月 30日
应用简报 了解音频电路中的运算放大器噪声 PDF | HTML 英语版 PDF | HTML 2022年 11月 14日
应用手册 AN-2132 Synchronizing Multiple GSPS ADCs in a System: The AutoSync Feature (Rev. G) 2017年 2月 3日
应用手册 Wide Bandwidth Receiver Implementation by Interleaving Two Giga-Sampling ADCs 2015年 12月 7日
应用手册 Signal Chain Noise Figure Analysis 2014年 10月 29日
应用手册 Synchronizing the Giga-Sample ADCs Interfaced with Multiple FPGAs 2014年 8月 6日
应用手册 AN-2128 ADC1xD1x00 Pin Compatibility (Rev. C) 2013年 5月 1日
应用手册 From Sample Instant to Data Output: Understanding Latency in the GSPS ADC 2012年 12月 18日
产品概述 ADC12Dxx00RF Direct RF-Sampling ADC Family 2012年 5月 16日

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仿真模型

ADC12D1600 IBIS Model (Rev. A)

SNAM125A.ZIP (43 KB) - IBIS Model
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封装 引脚 CAD 符号、封装和 3D 模型
CCGA (NAA) 376 Ultra Librarian

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包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
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  • 制造厂地点
  • 封装厂地点

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