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SN74LVC1G10

ACTIVE

Single 3-input, 1.65-V to 5.5-V NAND gate

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Data sheet

SN74LVC1G10

ACTIVE
Data sheet Order now

Product details

Technology family LVC Number of channels 1 Inputs per channel 3 IOL (max) (mA) 32 IOH (max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 1 Inputs per channel 3 IOL (max) (mA) 32 IOH (max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 125
SOT-SC70 (DCK) 6 4.2 mm² (2 mm × 2.1 mm) X2SON (DSF) 6 1 mm² (1 mm × 1 mm) SOT-23 (DBV) 6 8.12 mm² (2.9 mm × 2.8 mm) DSBGA (YZP) 6 2.1875 mm² (— mm × — mm) USON (DRY) 6 1.45 mm² (1.45 mm × 1 mm)
  • Available in the Texas Instruments NanoFree Package
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Provides Down Translation to VCC
  • Max tpd of 3.8 ns at 3.3 V
  • Low Power Consumption, 10-μA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back Drive Protection
  • Latch-Up Performance Exceeds 100 mA per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged Device Model (C101)
  • Available in the Texas Instruments NanoFree Package
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Provides Down Translation to VCC
  • Max tpd of 3.8 ns at 3.3 V
  • Low Power Consumption, 10-μA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back Drive Protection
  • Latch-Up Performance Exceeds 100 mA per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged Device Model (C101)

The SN74LVC1G10 performs the Boolean function Y = A • B • C or Y = A + B + C in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The SN74LVC1G10 performs the Boolean function Y = A • B • C or Y = A + B + C in positive logic.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN74LVC1G10 datasheet (Rev. E) Jan 11, 2012
Application brief MSPM0-Based Medical Alarm Design PDF | HTML Apr 26, 2023

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

5-8-LOGIC-EVM — Generic logic evaluation module for 5-pin to 8-pin DCK, DCT, DCU, DRL and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
User guide: PDF
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Evaluation board

5-8-NL-LOGIC-EVM — Generic logic and translation EVM supporting 5 to 8 pin DPW, DQE, DRY, DSF, DTM, DTQ and DTT pkgs

Generic EVM designed to support any logic or translation device that has a DTT, DRY, DPW, DTM, DQE, DQM, DSF, or DTQ package. Board design allows for flexible evaluation.

User guide: PDF | HTML
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Simulation model

SN74LVC1G10 Behavioral SPICE Model

SCEM641.ZIP (8 KB) - PSpice model
Supported products & hardware
Simulation model

SN74LVC1G10 IBIS Model (Rev. A)

SCEM368 (242 KB) - IBIS model
Supported products & hardware
Reference design

TIDA-010025 — Three-phase inverter reference design for 200-480 VAC drives with opto-emulated input gate drivers

This reference design realizes a reinforced isolated three-phase inverter subsystem using isolated IGBT gate drivers and isolated current/voltage sensors. The UCC23513 gate driver used has a 6-pin wide body package with optical LED emulated inputs which enables its use as pin-to-pin replacement to (...)
Supported products & hardware
Reference design

TIDA-010264 — MCU based medical alarm with supercapacitor backup reference design

This reference design is an non-application specific example medical alarm utilizing the MSPM0G1507 or MSPM0G3507 microcontroller (MCU) that demonstrates primary alarm, backup alarm and visual alarm functionality to assist with development in accordance with IEC 60601-1-8.

Supported products & hardware
Reference design

TIDA-01540 — Three-Phase Inverter Reference Design Using Gate Driver With Built-in Dead Time Insertion

The TIDA-01540 reference design reduces system cost and enables a compact design for a reinforced isolated 10kW three phase inverter. A lower system cost and compact form factor is achieved by using a dual gate driver in a single package and bootstrap configuration to generate floating voltages (...)
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Reference design

TIDA-01541 — High-Bandwidth Phase Current and DC-Link Voltage Sensing Reference Design for Three-Phase Inverters

The TIDA-01541 reference design reduces system cost and enables a compact design for isolated phase current and DC link voltage measurement in three-phase inverters, while achieving high bandwidth and sensing accuracy. The output of the isolated amplifiers is interfaced to the internal ADC of the (...)
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
SOT-SC70 (DCK) 6 Ultra Librarian
X2SON (DSF) 6 Ultra Librarian
SOT-23 (DBV) 6 Ultra Librarian
DSBGA (YZP) 6 Ultra Librarian
USON (DRY) 6 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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