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SN74LVC126A

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Four-channel, 1.65V to 3.6V buffers with three-state outputs

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Data sheet

SN74LVC126A

ACTIVE
Data sheet Order now

Product details

Technology family LVC Number of channels 4 IOL (max) (mA) 24 Supply current (max) (µA) 40 IOH (max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 4 IOL (max) (mA) 24 Supply current (max) (µA) 40 IOH (max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm) TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) SSOP (DB) 14 48.36 mm² (6.2 mm × 7.8 mm) VQFN (RGY) 14 12.25 mm² (3.5 mm × 3.5 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) WQFN (BQA) 14 7.5 mm² (3 mm × 2.5 mm) TVSOP (DGV) 14 23.04 mm² (3.6 mm × 6.4 mm)
  • Operates from 1.65V to 3.6V
  • Specified from –40°C to +125°C
  • Inputs accept voltages up to 5.5V
  • Maximum tpd of 4.7ns at 3.3V
  • Typical VOLP (output ground bounce), <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot), >2V at VCC = 3.3V, TA = 25°C
  • Latch-up performance exceeds 250mA per JESD 17
  • Operates from 1.65V to 3.6V
  • Specified from –40°C to +125°C
  • Inputs accept voltages up to 5.5V
  • Maximum tpd of 4.7ns at 3.3V
  • Typical VOLP (output ground bounce), <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot), >2V at VCC = 3.3V, TA = 25°C
  • Latch-up performance exceeds 250mA per JESD 17

The SN74LVC126A device is a quadruple bus buffer gate designed for 1.65V to 3.6V VCC operation.

The SN74LVC126A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE must be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V and 5V system environment.

The SN74LVC126A device is a quadruple bus buffer gate designed for 1.65V to 3.6V VCC operation.

The SN74LVC126A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE must be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V and 5V system environment.
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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN74LVC126A Quadruple Bus Buffer Gate With 3-State Outputs datasheet (Rev. U) PDF | HTML Jul 29, 2024
Design guide 18-V/400-W 98% Efficient Compact Brushless DC Motor Drive Design Guide Aug 23, 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

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Simulation model

SN74LVC126A Behavioral SPICE Model

SCAM110.ZIP (7 KB) - PSpice model
Supported products & hardware
Simulation model

SN74LVC126A IBIS Model (Rev. C)

SCEM014C.ZIP (45 KB) - IBIS model
Supported products & hardware
Reference design

TIDA-00771 — 10.8V/250W, 97% Efficient,Compact Brushless DC Motor Drive w/Stall Current Limit Reference Design

The TIDA-00771 is a 20 A RMS drive for a three phase brushless DC (BLDC) motor in power tools operating from a 3-cell Li-ion battery with a voltage range of 5 V to 12.6 V. This design is a 45 x 50 mm compact drive implementing sensor-based trapezoidal control. The design uses a discrete, compact (...)

Supported products & hardware
Reference design

TIDA-00772 — 18-V/400-W 98% Efficient Compact Brushless DC Motor Drive w/Stall Current Limit Reference Design

The TIDA-00772 is a 18 A RMS drive for a three phase brushless DC (BLDC) motor in power tools operating from a 5-cell Li-ion battery with a voltage up to 21 V. This design is a 45 x 50 mm compact drive implementing sensor-based trapezoidal control. The design uses a discrete, compact MOSFET-based (...)
Supported products & hardware
Reference design

TIDA-01606 — 11-kW, bidirectional three-phase three-level (T-type) inverter and PFC reference design

This reference design provides an overview on how to implement a bidirectional three-level, three-phase, SiC-based active front end (AFE) inverter and power factor correction (PFC) stage. The design uses switching frequency up to 90kHz and an LCL output filter to reduce the size of the magnetics. (...)
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
SOP (NS) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
SSOP (DB) 14 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
WQFN (BQA) 14 Ultra Librarian
TVSOP (DGV) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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