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SN74HCS165

ACTIVE

8-bit parallel-load shift registers with Schmitt-trigger inputs

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Data sheet

SN74HCS165

ACTIVE
Data sheet Order now

Product details

Configuration Parallel-in, Serial-out Bits (#) 8 Technology family HCS Input type Schmitt-Trigger Output type Push-Pull Clock frequency (MHz) 150 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Catalog
Configuration Parallel-in, Serial-out Bits (#) 8 Technology family HCS Input type Schmitt-Trigger Output type Push-Pull Clock frequency (MHz) 150 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Catalog
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm) SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm) WQFN (BQB) 16 8.75 mm² (3.5 mm × 2.5 mm) SOT-23-THN (DYY) 16 8.4 mm² (4.2 mm × 2 mm)
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • Extended ambient temperature range: –40°C to +125°C, TA
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • Extended ambient temperature range: –40°C to +125°C, TA

The SN74HCS165 is a parallel- or serial-in, serial-out 8-bit shift register with Schmitt-trigger inputs.

The SN74HCS165 is a parallel- or serial-in, serial-out 8-bit shift register with Schmitt-trigger inputs.
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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN74HCS165 8-Bit Parallel-Load Shift Registers datasheet (Rev. A) PDF | HTML May 25, 2021
Application brief Using Linear Interpolation to Estimate Specification Values PDF | HTML Apr 13, 2026
Application note Designing with Shift Registers PDF | HTML Jul 14, 2022
Application brief Overcoming Last-Minute Feature Creep with Modern Shift Registers PDF | HTML Nov 3, 2020
Technical article New logic family enables noise-tolerant and lower-power system designs PDF | HTML Nov 12, 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

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Simulation model

SN74HCS165 IBIS Model (Rev. B)

SCEM779B.ZIP (251 KB) - IBIS model
Supported products & hardware
Reference design

TIDA-011002 — Cost effective IO-Link Master module reference design

This reference design accelerates the development of IO-Link controller gateways by implementing an 8- port IO-Link gateway that supports up to 400μs cycle time, COM3, 1A per port on L+, and an additional DI/DO. The design supports various Ethernet-based industrial protocols such as EtherCAT®, (...)

Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
WQFN (BQB) 16 Ultra Librarian
SOT-23-THN (DYY) 16 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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