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SN54SC1G175-SEP

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Radiation-tolerant single flip-flop with clear

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Data sheet

SN54SC1G175-SEP

ACTIVE
Data sheet Order now

Product details

Operating temperature range (°C) to Rating Space
Operating temperature range (°C) to Rating Space
SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8
  • VID V62/26610
  • Radiation - Total Ionizing Dose (TID):
    • TID characterized up to 50krad(Si)
    • TID performance assurance up to 30krad(Si)
    • Radiation Lot Acceptance Testing (RLAT) for every wafer lot up to 30krad(Si)
  • Radiation - Single-Event Effects (SEE):
    • Single Event Latch-Up (SEL) immune up to 50MeV-cm2/mg at 125°C
    • Single Event Transient (SET) characterized up to LET = 50MeV-cm2/mg

  • Wide operating range of 1.2V to 5.5V

  • 5.5V tolerant input pins
  • Supports standard pinouts
  • Up to 150Mbps with 5V or 3.3V VCC
  • Latch-up performance exceeds 100mA per JESD 78
  • Space enhanced plastic:
    • Supports Defense and Aerospace Applications
    • Controlled baseline
    • Au bondwire and NiPdAu lead finish
    • Meets NASA ASTM E595 outgassing specification
    • One fabrication, assembly, and test site
    • Extended product life cycle
    • Product traceability
  • VID V62/26610
  • Radiation - Total Ionizing Dose (TID):
    • TID characterized up to 50krad(Si)
    • TID performance assurance up to 30krad(Si)
    • Radiation Lot Acceptance Testing (RLAT) for every wafer lot up to 30krad(Si)
  • Radiation - Single-Event Effects (SEE):
    • Single Event Latch-Up (SEL) immune up to 50MeV-cm2/mg at 125°C
    • Single Event Transient (SET) characterized up to LET = 50MeV-cm2/mg

  • Wide operating range of 1.2V to 5.5V

  • 5.5V tolerant input pins
  • Supports standard pinouts
  • Up to 150Mbps with 5V or 3.3V VCC
  • Latch-up performance exceeds 100mA per JESD 78
  • Space enhanced plastic:
    • Supports Defense and Aerospace Applications
    • Controlled baseline
    • Au bondwire and NiPdAu lead finish
    • Meets NASA ASTM E595 outgassing specification
    • One fabrication, assembly, and test site
    • Extended product life cycle
    • Product traceability

The SN54SC1G175-SEP device is a single D-type flip-flop with asynchronous clear (CLR) input. When CLR is HIGH, data from the input pin (D) transfers to the output pin (Q) on the clock’s (CLK) rising edge. When CLR is LOW, the Q is forced into the LOW state, regardless of the clock edge or data on D.

The SN54SC1G175-SEP device is a single D-type flip-flop with asynchronous clear (CLR) input. When CLR is HIGH, data from the input pin (D) transfers to the output pin (Q) on the clock’s (CLK) rising edge. When CLR is LOW, the Q is forced into the LOW state, regardless of the clock edge or data on D.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN54SC1G175-SEP Single D-Type Flip-Flop With Asynchronous Clear datasheet PDF | HTML 20 Feb 2026
* Radiation & reliability report SN54SC1G175-SEP Production Flow and Reliability Report PDF | HTML 06 Feb 2026
* Radiation & reliability report SN54SC1G175-SEP Single-Event Effects (SEE) Radiation Report PDF | HTML 06 Feb 2026
* Radiation & reliability report SN54SC1G175-SEP Total Ionizing Dose (TID) Report 06 Feb 2026

Design & development

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Evaluation board

5-8-LOGIC-EVM — Generic logic evaluation module for 5-pin to 8-pin DCK, DCT, DCU, DRL and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
User guide: PDF
Not available on TI.com
Package Pins CAD symbols, footprints & 3D models
SOT-23 (DBV) 6 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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