The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.
The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100 Ω) input Fail-safe. The receiver output is HIGH for all fail-safe conditions.
The DS90LV032A and companion LVDS line driver (for example, DS90LV031A) provide a new alternative to high power PECL or ECL devices for high speed point-to-point interface applications.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | DS90LV032A 3-V LVDS Quad CMOS Differential Line Receiver datasheet (Rev. D) | PDF | HTML | Aug 24, 2016 |
| Application brief | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | Aug 3, 2018 | ||
| Application brief | How to Terminate LVDS Connections with DC and AC Coupling | May 16, 2018 | ||
| Application note | AN-1110 LVDS Quad Dynamic I CC vs Frequency | May 15, 2004 | ||
| Application note | An Overview of LVDS Technology | Oct 5, 1998 |
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| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |
| TSSOP (PW) | 16 | Ultra Librarian |
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