The 12-bit, 2.0/3.2 GSPS ADC12D1x00 device is the latest advance in TI’s Ultra High-Speed ADC family and builds upon the features, architecture, and functionality of the 10-bit GHz family of ADCs.
The ADC12D1x00 provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and support programmable common-mode voltage.
The ADC12D1x00 is packaged in a leaded or lead-free 292-pin thermally enhanced BGA package over the rated industrial temperature range of –40°C to 85°C.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | ADC12D1x00 12-Bit, 2.0/3.2 GSPS Ultra High-Speed ADC datasheet (Rev. N) | PDF | HTML | Aug 31, 2015 |
| Application note | AN-2132 Synchronizing Multiple GSPS ADCs in a System: The AutoSync Feature (Rev. G) | Feb 3, 2017 | ||
| Application note | Maximizing SFDR Performance in the GSPS ADC: Spur Sources and Methods of Mitigat | Dec 9, 2013 | ||
| Application note | AN-2128 ADC1xD1x00 Pin Compatibility (Rev. C) | May 1, 2013 | ||
| User guide | Schematic and Layout Recommendations for the GSPS ADC | Apr 29, 2013 | ||
| Application note | AN-2177 Using the LMH6554 as a ADC Driver (Rev. A) | Apr 26, 2013 | ||
| Application note | From Sample Instant to Data Output: Understanding Latency in the GSPS ADC | Dec 18, 2012 | ||
| Product overview | ADC12D1x00 12-bit ADC Family: Ultra High-Speed 12-bit ADCs up to 3.6 GSPS | May 16, 2012 | ||
| User guide | 12-Bit, Dual 1.6/1.8 GSPS or Single 3.2/3.6 GSPS Ref Bd User Guide | Jan 25, 2012 |
For additional terms or required resources, click any title below to view the detail page where available.
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| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| PBGA (NXA) | 292 | Ultra Librarian |
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