TIDEP0033

SPI Master with Signal Path Delay Compensation Reference Design

Design files

TIDEP0033

Design files

Overview

The Programmable Real-time Unit within the Industrial Communication Subsystem (PRU-ICSS) enables you to support real-time critical applications without using FPGAs, CPLDs or ASICs.
This reference design describes the implementation of the SPI master protocol with signal path delay compensation on PRU-ICSS. It supports the 32-bit communication protocol of ADS8688 with a SPI clock frequency of up to 16.7 MHz.

Features

SPI master protocol with adjustable signal path delay compensation (not requiring external hardware for signal path delay compensation)
Up to 16.7-MHz SPI clock
Supports ADS8688 SPI-communication protocol
Automatic measurement of signal path delay for known secondary response
This PRU-ICSS firmware has been validated with TIDA-00164 (ADS8688 and ISO7141CC) and contains firmware source code, implementation description and getting started instructions.

Industrial

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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

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Design guide — TIDEP0033

TIDUA38A.PDF (1142 KB)

Reference design overview and verified performance test data

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Assembly drawing — TIDEP0033

TIDRF80.ZIP (448 KB)

Detailed overview of design layout for component placement

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Bill of materials (BOM) — TIDEP0033

TIDRF79.PDF (124 KB)

Complete listing of design components, reference designators, and manufacturers/part numbers

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CAD/CAE symbol — TIDEP0033

TIDRF82.ZIP (384 KB)

Files used for 3D models or 2D drawings of IC components

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Gerber file — TIDEP0033

TIDCAG2.ZIP (5563 KB)

Design file that contains information on physical board layer of design PCB

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PCB layout — TIDEP0033

TIDRF81.ZIP (448 KB)

PCB layer plot file used for generating PCB design layout

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Schematic — TIDEP0033

TIDRF78.PDF (248 KB)

Detailed schematic diagram for design layout and components

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Isolated CAN transceivers

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Start development

Software

Firmware

TIDCAG3 — SPI Master With Signal Path Delay Compensation on PRU-ICSS Firmware

Supported products & hardware

Hardware development

Reference design

TIDEP0033 — SPI Master with Signal Path Delay Compensation Reference Design

Download options

TIDCAG3 — SPI Master With Signal Path Delay Compensation on PRU-ICSS Firmware

Latest version

Version: 01.00.00.00

Release date: Jun 14, 2015

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SPI Master With Signal Path Delay Compensation on PRU-ICSS Firmware (zip) — 28 K

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Hardware development

Reference design

TIDEP0033 — SPI Master with Signal Path Delay Compensation Reference Design

Release Information

The design resource accessed as www.ti.com/lit/zip/tidcag3 or www.ti.com/lit/xx/tidcag3/tidcag3.zip has been migrated to a new user experience at www.ti.com/tool/download/TIDCAG3. Please update any bookmarks accordingly.

Technical documentation

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	Type	Title		Date
*	Design guide	SPI Master With Signal Path Delay Compensation on PRU-ICSS Design Guide (Rev. A)		Jul 13, 2015

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