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SN74LV11A-Q1

現行
立即訂購
產品規格表

SN74LV11A-Q1

現行
產品規格表 立即訂購

產品詳細資料

Technology family LV-A Number of channels 3 Inputs per channel 3 IOL (max) (mA) 12 IOH (max) (mA) -12 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 70 Rating Automotive Operating temperature range (°C) -40 to 105
Technology family LV-A Number of channels 3 Inputs per channel 3 IOL (max) (mA) 12 IOH (max) (mA) -12 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 70 Rating Automotive Operating temperature range (°C) -40 to 105
TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm)
  • Qualified for Automotive Applications
  • Operation of 2-V to 5.5-V V CC
  • Typical V OLP (Output Ground Bounce) <0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (Output V OH Undershoot) >2.3 V at V CC = 3.3 V, T A = 25°C
  • Support Mixed-Mode Voltage Operation on All Ports
  • I off Supports Partial-Power-Down Mode Operation
  • Qualified for Automotive Applications
  • Operation of 2-V to 5.5-V V CC
  • Typical V OLP (Output Ground Bounce) <0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (Output V OH Undershoot) >2.3 V at V CC = 3.3 V, T A = 25°C
  • Support Mixed-Mode Voltage Operation on All Ports
  • I off Supports Partial-Power-Down Mode Operation

These triple 3-input positive-AND gates are designed for 2-V to 5.5-V V CC operation.

The SN74LV11A-Q1 devices perform the Boolean function Y = A • B • C or Y = A + B + C in positive logic.

These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

These triple 3-input positive-AND gates are designed for 2-V to 5.5-V V CC operation.

The SN74LV11A-Q1 devices perform the Boolean function Y = A • B • C or Y = A + B + C in positive logic.

These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 SN74LV11A-Q1 Automotive Triple 3-Input Positive-NAND Gate datasheet (Rev. E) PDF | HTML 2023/7/14
更多文件說明 Automotive Logic Devices Brochure 2014/8/27

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