Home Interface I2C, I3C & SPI ICs I2C & SPI general-purpose I/Os (GPIOs)
Home
Interface
I2C, I3C & SPI ICs
I2C & SPI general-purpose I/Os (GPIOs)
NEW

TXE8148

ACTIVE

48-bit SPI bus I/O expander with interrupt, reset, and I/O configurable registers

Order now
Data sheet

TXE8148

ACTIVE
Data sheet Order now

Product details

Number of I/Os 48 Features Configuration registers, Fail-safe, Interrupt pin, Reset pin Supply voltage (min) (V) 1.65 Supply voltage (max) (V) 5.5 Rating Catalog Frequency (max) (MHz) 10 Operating temperature range (°C) -40 to 125
Number of I/Os 48 Features Configuration registers, Fail-safe, Interrupt pin, Reset pin Supply voltage (min) (V) 1.65 Supply voltage (max) (V) 5.5 Rating Catalog Frequency (max) (MHz) 10 Operating temperature range (°C) -40 to 125
TSSOP (DGG) 56 113.4 mm² 14 x 8.1
  • Functional Safety-Capable
  • Operating supply voltage range of 1.65V to 5.5V
  • Low standby current consumption of 6µA typical
  • 10MHz SPI SCLK frequency
  • SPI daisy-chain supported
  • SPI read and write with burst mode
  • Multi-port SPI command to configure multiple ports simultaneously
  • IOFF supported input port pins
  • Active-low reset input (RESET)
  • Open-drain active-low interrupt output (INT)
    • Interrupt mask and status per I/O
    • Interrupt status per port
  • Built-in fail safe I/O feature
  • Individual I/O configuration for:
    • Input and output function
    • Polarity inversion
    • Output push-pull and open-drain selection
    • Integrated pullup or pulldown selection
    • Bus-hold feature to maintain last I/O state
    • Glitch filter enable selection
  • Latched outputs with 10mA drive capability for directly driving LEDs
  • Latch-up performance exceeds 100mA per AEC Q100-004
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • Functional Safety-Capable
  • Operating supply voltage range of 1.65V to 5.5V
  • Low standby current consumption of 6µA typical
  • 10MHz SPI SCLK frequency
  • SPI daisy-chain supported
  • SPI read and write with burst mode
  • Multi-port SPI command to configure multiple ports simultaneously
  • IOFF supported input port pins
  • Active-low reset input (RESET)
  • Open-drain active-low interrupt output (INT)
    • Interrupt mask and status per I/O
    • Interrupt status per port
  • Built-in fail safe I/O feature
  • Individual I/O configuration for:
    • Input and output function
    • Polarity inversion
    • Output push-pull and open-drain selection
    • Integrated pullup or pulldown selection
    • Bus-hold feature to maintain last I/O state
    • Glitch filter enable selection
  • Latched outputs with 10mA drive capability for directly driving LEDs
  • Latch-up performance exceeds 100mA per AEC Q100-004
  • Latch-up performance exceeds 100mA per JESD 78, class II

The TXE8148 device provides general purpose parallel input/output (I/O) expansion for the four wire Serial Peripheral Interface (SPI) protocol and is designed for 1.65V to 5.5V VCC operation. The SPI protocol supports standard point-to-point communication along with daisy-chaining of multiple TXE8148.

The device supports SPI bus frequency of 10MHz from 1.65V to 5.5V. I/O expanders such as the TXE8148 provide a simple design when additional I/Os are needed for switches, sensors, push-buttons, LEDs, fans, and so on.

The TXE8148 has six I/O ports each with eight IOs per port, which include additional features designed to enhance the I/O performance in terms of speed, power consumption and EMI. These features include per I/O programmable open-drain or push-pull outputs, programmable pullup and pulldown resistors, bus-hold latchable inputs, maskable interrupt, interrupt status register, and a fail-safe register mode which is enabled by the FAIL-SAFE pin.

The TXE8148 device provides general purpose parallel input/output (I/O) expansion for the four wire Serial Peripheral Interface (SPI) protocol and is designed for 1.65V to 5.5V VCC operation. The SPI protocol supports standard point-to-point communication along with daisy-chaining of multiple TXE8148.

The device supports SPI bus frequency of 10MHz from 1.65V to 5.5V. I/O expanders such as the TXE8148 provide a simple design when additional I/Os are needed for switches, sensors, push-buttons, LEDs, fans, and so on.

The TXE8148 has six I/O ports each with eight IOs per port, which include additional features designed to enhance the I/O performance in terms of speed, power consumption and EMI. These features include per I/O programmable open-drain or push-pull outputs, programmable pullup and pulldown resistors, bus-hold latchable inputs, maskable interrupt, interrupt status register, and a fail-safe register mode which is enabled by the FAIL-SAFE pin.
filter Find other I2C & SPI general-purpose I/Os (GPIOs)
Download View video with transcript Video

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 2
Top documentation Type Title Format options Date
* Data sheet TXE8148 48-Bit SPI Bus I/O Expander With Interrupt Output, Reset Input, and I/O Configuration Registers datasheet PDF | HTML 26 Jun 2026
Functional safety information TXE8148 Functional Safety FIT Rate, FMD and Pin FMA PDF | HTML 08 May 2026

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

IO-EXP-ADAPTER-EVM — IO expander adapter evaluation module

The IO-EXP-ADAPTER-EVM is an evaluation module that can break away into four separate PCBs for testing and debugging. The IO-EXP-ADAPTER-EVM supports many package types from our I2C and SPI IO expander portfolio.
User guide: PDF | HTML
Not available on TI.com
Evaluation board

TXE81XXEVM — TXE81XX evaluation module

The TXE81XXEVM allows the evaluation of the TXE81XX family of SPI I/O expanders. This EVM supports TXE8116, TXE8124, and TXE8148 (16-bit, 24-bit, and 48-bit, respectively) in the leaded package type DGS(24 and 32) and DGG (56). The EVM provides access to many test points and headers to accompany (...)

User guide: PDF | HTML
Not available on TI.com
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Request
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
View Options
Package Pins CAD symbols, footprints & 3D models
TSSOP (DGG) 56 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos