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SN74LXCH8T245

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8-bit dual-supply bus transceiver with configurable voltage translation and 3-state outputs

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Data sheet

SN74LXCH8T245

ACTIVE
Data sheet Order now

Product details

Bits (#) 8 Data rate (max) (Mbps) 420 Technology family LXC Vout (min) (V) 1.1 Supply current (max) (mA) 0.012 Features Bus-hold, Integrated pulldown resistors, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc disconnect, Vcc isolation Applications GPIO, JTAG, SPI, UART Rating Catalog Operating temperature range (°C) -40 to 125
Bits (#) 8 Data rate (max) (Mbps) 420 Technology family LXC Vout (min) (V) 1.1 Supply current (max) (mA) 0.012 Features Bus-hold, Integrated pulldown resistors, Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc disconnect, Vcc isolation Applications GPIO, JTAG, SPI, UART Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 24 49.92 mm² 7.8 x 6.4 VQFN (RHL) 24 19.25 mm² 5.5 x 3.5
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate from 1.1 V to 5.5 V
  • Robust, Glitch-Free Power Supply Sequencing
  • Up to 420-Mbps Support for 3.3 V to 5.0 V
  • Bus Hold on Data Inputs Eliminates the Need for External Pull-Up and Pull-Down Resistors
  • Schmitt-Trigger Control Inputs Allow for Slow or Noisy Inputs
  • Control Inputs with Integrated Static Pull-Down Resistors Allow for Floating Control Inputs
  • High Drive Strength (up to 32 mA at 5 V)
  • Low Power Consumption
    • 4-µA Maximum (25°C)
    • 12-µA Maximum (–40°C to 125°C)
  • VCC Isolation and VCC Disconnect feature
    • If Either VCC Supply is < 100 mV All I/O’s Become High-Impedance
    • Ioff-float Supports VCC Disconnect Operation
  • Ioff Supports Partial-Power-Down Mode Operation
  • Compatible with LVC Family Level Shifters
  • Control Logic (DIR and OE) are Referenced to VCCA
  • Operating Temperature from –40°C to +125°C
  • Latch-Up Performance Exceeds 100 mA per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 4000-V Human-Body Model
    • 1000-V Charged-Device Model
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate from 1.1 V to 5.5 V
  • Robust, Glitch-Free Power Supply Sequencing
  • Up to 420-Mbps Support for 3.3 V to 5.0 V
  • Bus Hold on Data Inputs Eliminates the Need for External Pull-Up and Pull-Down Resistors
  • Schmitt-Trigger Control Inputs Allow for Slow or Noisy Inputs
  • Control Inputs with Integrated Static Pull-Down Resistors Allow for Floating Control Inputs
  • High Drive Strength (up to 32 mA at 5 V)
  • Low Power Consumption
    • 4-µA Maximum (25°C)
    • 12-µA Maximum (–40°C to 125°C)
  • VCC Isolation and VCC Disconnect feature
    • If Either VCC Supply is < 100 mV All I/O’s Become High-Impedance
    • Ioff-float Supports VCC Disconnect Operation
  • Ioff Supports Partial-Power-Down Mode Operation
  • Compatible with LVC Family Level Shifters
  • Control Logic (DIR and OE) are Referenced to VCCA
  • Operating Temperature from –40°C to +125°C
  • Latch-Up Performance Exceeds 100 mA per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 4000-V Human-Body Model
    • 1000-V Charged-Device Model

The SN74LXCH8T245 is an 8-bit, dual-supply noninverting bidirectional voltage level translation device with bus-hold circuitry. Ax pins and control pins (DIR and OE) are referenced to VCCA logic levels, and Bx pins are referenced to VCCB logic levels. The A port is able to accept I/O voltages ranging from 1.1 V to 5.5 V, while the B port can accept I/O voltages from 1.1 V to 5.5 V. A high on DIR allows data transmission from A to B and a low on DIR allows data transmission from B to A when OE is set to low. When OE is set to high, both Ax and Bx pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

The SN74LXCH8T245 is an 8-bit, dual-supply noninverting bidirectional voltage level translation device with bus-hold circuitry. Ax pins and control pins (DIR and OE) are referenced to VCCA logic levels, and Bx pins are referenced to VCCB logic levels. The A port is able to accept I/O voltages ranging from 1.1 V to 5.5 V, while the B port can accept I/O voltages from 1.1 V to 5.5 V. A high on DIR allows data transmission from A to B and a low on DIR allows data transmission from B to A when OE is set to low. When OE is set to high, both Ax and Bx pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.
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Technical documentation

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Type Title Date
* Data sheet SN74LXCH8T245 8-bit Translating Transceiver with Configurable Level Shifting datasheet (Rev. B) PDF | HTML 15 Mar 2021
Application note Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 02 Oct 2024
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 12 Jul 2024
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 03 Jul 2024
Application brief Bringing Together 5G Signal Chains With Level Translation PDF | HTML 05 Mar 2021

Design & development

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Evaluation board

AVCLVCDIRCNTRL-EVM — Generic EVM for Direction-Controlled Bidirectional Translation Device Supporting AVC and LVC

The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC (...)

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TSSOP (PW) 24 Ultra Librarian
VQFN (RHL) 24 Ultra Librarian
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