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SN74LVC1G3157

ACTIVE

5V, 2:1 (SPDT), 1-channel, analog switch

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Data sheet

SN74LVC1G3157

ACTIVE
Data sheet Order now

Product details

Configuration 2:1 SPDT Number of channels 1 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 6 CON (typ) (pF) 17.3 ON-state leakage current (max) (µA) 1 Supply current (typ) (µA) 1 Bandwidth (MHz) 340 Operating temperature range (°C) -40 to 125 Features Break-before-make Input/output continuous current (max) (A) 0.128 Rating Catalog Drain supply voltage (max) (V) 5.5
Configuration 2:1 SPDT Number of channels 1 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 6 CON (typ) (pF) 17.3 ON-state leakage current (max) (µA) 1 Supply current (typ) (µA) 1 Bandwidth (MHz) 340 Operating temperature range (°C) -40 to 125 Features Break-before-make Input/output continuous current (max) (A) 0.128 Rating Catalog Drain supply voltage (max) (V) 5.5
SOT-23 (DBV) 6 8.12 mm² (2.9 mm × 2.8 mm) SOT-SC70 (DCK) 6 4.2 mm² (2 mm × 2.1 mm) USON (DRY) 6 1.45 mm² (1.45 mm × 1 mm) X2SON (DSF) 6 1 mm² (1 mm × 1 mm) X2SON (DTB) 6 0.8 mm² (1 mm × 0.8 mm) DSBGA (YZP) 6 2.1875 mm² (— mm × — mm) SOT-5X3 (DRL) 6 2.56 mm² (1.6 mm × 1.6 mm)
  • ESD protection exceeds JESD 22
    • 2000V Human Body Model (A114-A)
    • 1000V Charged-Device Model (C101)
  • 1.65V to 5.5V VCC operation
  • Qualified for 125°C operation
  • Specified break-before-make switching
  • Rail-to-rail signal handling
  • Operating frequency typically 340MHz at room temperature
  • High speed, typically 0.5ns (VCC = 3V, CL = 50pF)
  • Low ON-state resistance, typically approximately 6Ω (VCC = 4.5V)
  • Latch-up performance exceeds 100mA Per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000V Human Body Model (A114-A)
    • 1000V Charged-Device Model (C101)
  • 1.65V to 5.5V VCC operation
  • Qualified for 125°C operation
  • Specified break-before-make switching
  • Rail-to-rail signal handling
  • Operating frequency typically 340MHz at room temperature
  • High speed, typically 0.5ns (VCC = 3V, CL = 50pF)
  • Low ON-state resistance, typically approximately 6Ω (VCC = 4.5V)
  • Latch-up performance exceeds 100mA Per JESD 78, class II

This single channel single-pole double-throw (SPDT) analog switch is designed for 1.65V to 5.5V VCC operation.

The SN74LVC1G3157 device handles both analog and digital signals. The SN74LVC1G3157 device allows signals with amplitudes of up to VCC (peak) to be transmitted in either direction.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

This single channel single-pole double-throw (SPDT) analog switch is designed for 1.65V to 5.5V VCC operation.

The SN74LVC1G3157 device handles both analog and digital signals. The SN74LVC1G3157 device allows signals with amplitudes of up to VCC (peak) to be transmitted in either direction.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.
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Technical documentation

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* Data sheet SN74LVC1G3157 Single-Pole Double-Throw Analog Switch datasheet (Rev. O) PDF | HTML Jun 10, 2025
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Application brief How to Prevent Errors in Voltage Readings When Using Multiplexers with High Input Impedance Op-Amps PDF | HTML Feb 13, 2025
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Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML Jun 2, 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML Dec 1, 2021
More literature SN74LVC1G3157 and SNS74LVC2G53 SPDT Analog Switches Jun 12, 2003

Design & development

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Evaluation board

DIP-ADAPTER-EVM — DIP adapter evaluation module

Speed up your op amp prototyping and testing with the DIP adapter evaluation module (DIP-ADAPTER-EVM), which provides a fast, easy and inexpensive way to interface with small surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them (...)

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Interface adapter

LEADLESS-ADAPTER1 — Surface mount to DIP header adapter for testing of TI's 6,8,10,12,14,16, & 20-pin leadless packages

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
User guide: PDF
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Simulation model

HSPICE Model of SN74LVC1G3157

SCEJ160.ZIP (98 KB) - HSpice model
Supported products & hardware
Simulation model

SN74LVC1G3157 IBIS Model (Rev. B)

SCEM322A (308 KB) - IBIS model
Supported products & hardware

Many TI reference designs include the SN74LVC1G3157

Use our reference design selection tool to review and identify designs that best match your application and parameters.
Package Pins CAD symbols, footprints & 3D models
SOT-23 (DBV) 6 Ultra Librarian
SOT-SC70 (DCK) 6 Ultra Librarian
USON (DRY) 6 Ultra Librarian
X2SON (DSF) 6 Ultra Librarian
X2SON (DTB) 6 Ultra Librarian
DSBGA (YZP) 6 Ultra Librarian
SOT-5X3 (DRL) 6 Ultra Librarian
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