SN74LVC08A

ACTIVE

Four-channel two-input 1.65V to 3.6V AND gate

Product details

Technology family LVC Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 125
SSOP (DB) 14 48.36 mm² (6.2 mm × 7.8 mm) WQFN (BQA) 14 7.5 mm² (3 mm × 2.5 mm) VQFN (RGY) 14 12.25 mm² (3.5 mm × 3.5 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm)
  • Latch-up performance exceeds 250mA per JESD 17
  • ESD protection exceeds JESD 22
    • 2000V Human-Body Model (A114-A)
    • 1000V Charged-Device Model (C101)
    • On products compliant to MIL-PRF-38535, All parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
  • SN74LVC08A operates from 1.65V to 3.6V
  • SN54LVC08A operates from 2.0V to 3.6V
  • SNx4LVC08A specified from –40°C to +85°C and –40°C to +125°C
  • SN54LVC08A specified from –55°C to +125°C
  • Inputs accept voltages to 5.5V
  • Max tpd of 4.1ns at 3.3V
  • Typical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2V at VCC = 3.3V, TA = 25°C
  • Latch-up performance exceeds 250mA per JESD 17
  • ESD protection exceeds JESD 22
    • 2000V Human-Body Model (A114-A)
    • 1000V Charged-Device Model (C101)
    • On products compliant to MIL-PRF-38535, All parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
  • SN74LVC08A operates from 1.65V to 3.6V
  • SN54LVC08A operates from 2.0V to 3.6V
  • SNx4LVC08A specified from –40°C to +85°C and –40°C to +125°C
  • SN54LVC08A specified from –55°C to +125°C
  • Inputs accept voltages to 5.5V
  • Max tpd of 4.1ns at 3.3V
  • Typical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2V at VCC = 3.3V, TA = 25°C

The SN54LVC08A quadruple 2-input positive-AND gate is designed for 2.7V to 3.6V VCC operation, and the SN74LVC08A quadruple 2-input positive-AND gate is designed for 1.65V to 3.6V VCC operation.

The SNx4LVC08A devices perform the Boolean function Y = A • B or Y = /A + /B in positive logic.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment.

The SN54LVC08A quadruple 2-input positive-AND gate is designed for 2.7V to 3.6V VCC operation, and the SN74LVC08A quadruple 2-input positive-AND gate is designed for 1.65V to 3.6V VCC operation.

The SNx4LVC08A devices perform the Boolean function Y = A • B or Y = /A + /B in positive logic.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment.

Download View video with transcript Video

Technical documentation

No results found. Please clear your search and try again.
View all 3
Top documentation Type Title Format options Date
* Data sheet SNx4LVC08A Quadruple 2-Input Positive-AND Gates datasheet (Rev. W) PDF | HTML Jul 29, 2024
Application brief Optimizing Board Space for Discrete LOGIC Designs Using Smallest Package Solutio (Rev. A) PDF | HTML Sep 29, 2022
Application brief Optimizing DC Fast Charger Systems Using Logic and Translation PDF | HTML Sep 22, 2022

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Supported products & hardware
In stock
Limit:
??asset.out-of-stock-ti_en_US??
Not available
Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

User guide: PDF | HTML
Supported products & hardware
In stock
Limit:
??asset.out-of-stock-ti_en_US??
Not available
Simulation model

SN74LVC08A Behavioral SPICE Model

SCAM114.ZIP (7 KB) - PSpice model
Supported products & hardware
Simulation model

SN74LVC08A IBIS Model (Rev. A)

SCEM010 (8 KB) - IBIS model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
SSOP (DB) 14 Ultra Librarian
WQFN (BQA) 14 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
SOP (NS) 14 Ultra Librarian

Ordering & quality

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos