Home Logic & voltage translation Flip-flops, latches & registers D-type flip-flops
Home
Logic & voltage translation
Flip-flops, latches & registers
D-type flip-flops

SN74LV174A

ACTIVE

Hex D-Type Flip-Flops With Clear

Order now
Data sheet

SN74LV174A

ACTIVE
Data sheet Order now

Product details

Number of channels 6 Technology family LV-A Input type Standard CMOS Output type Push-Pull Clock frequency (max) (MHz) 70 IOL (max) (mA) 12 IOH (max) (mA) -12 Supply current (max) (µA) 20 Features Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Partial power down (Ioff) Operating temperature range (°C) -40 to 85 Rating Catalog
Number of channels 6 Technology family LV-A Input type Standard CMOS Output type Push-Pull Clock frequency (max) (MHz) 70 IOL (max) (mA) 12 IOH (max) (mA) -12 Supply current (max) (µA) 20 Features Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Partial power down (Ioff) Operating temperature range (°C) -40 to 85 Rating Catalog
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm) SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm) TVSOP (DGV) 16 23.04 mm² (3.6 mm × 6.4 mm) SOP (NS) 16 79.56 mm² (10.2 mm × 7.8 mm)
  • V CC operation of 2 V to 5.5
  • Maximum t pd of 7.5 ns at 5 V
  • Typical V OLP (output ground bounce) < 0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (output V OH undershoot) > 2.3 V at V CC = 3.3 V, T A = 25°C
  • I off supports partial-power-down mode operation
  • Supports mixed-mode voltage operation on all ports
  • Latch-up performance exceeds 250 mA per JESD 17
  • V CC operation of 2 V to 5.5
  • Maximum t pd of 7.5 ns at 5 V
  • Typical V OLP (output ground bounce) < 0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (output V OH undershoot) > 2.3 V at V CC = 3.3 V, T A = 25°C
  • I off supports partial-power-down mode operation
  • Supports mixed-mode voltage operation on all ports
  • Latch-up performance exceeds 250 mA per JESD 17

The ’LV174A devices are hex D-type flip-flops designed for 2 V to 5.5 V V CC operation.

The ’LV174A devices are hex D-type flip-flops designed for 2 V to 5.5 V V CC operation.

filter Find other D-type flip-flops
Download View video with transcript Video

Similar products you might be interested in

open-in-new Compare alternates
Similar functionality to the compared device.
CD4049UB ACTIVE 6-ch, 3-V to 18-V inverters Voltage range 3V to 18V, average propagation delay 130ns

Technical documentation

No results found. Please clear your search and try again.
View all 2
Top documentation Type Title Format options Date
* Data sheet SN74LV174A Hex D-Type Flip-Flops With Clear datasheet (Rev. I) PDF | HTML Mar 24, 2023
Application note Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML Dec 15, 2022

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Supported products & hardware
In stock
Limit:
??asset.out-of-stock-ti_en_US??
Not available
Simulation model

SN74LV174A IBIS Model

SCEM133.ZIP (16 KB) - IBIS model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
TVSOP (DGV) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos