These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | SNx4HCT240 Octal Buffers and Line Drivers With 3-State Outputs datasheet (Rev. H) | PDF | HTML | Aug 22, 2024 |
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The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| PDIP (N) | 20 | Ultra Librarian |
| SOP (NS) | 20 | Ultra Librarian |
| TSSOP (PW) | 20 | Ultra Librarian |
| VSSOP (DGS) | 20 | Ultra Librarian |
| SOIC (DW) | 20 | Ultra Librarian |
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