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SN74HCT165

ACTIVE

8-bit parallel-in/serial-out shift register

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Data sheet

SN74HCT165

ACTIVE
Data sheet Order now

Product details

Configuration Parallel-in, Serial-out Bits (#) 8 Technology family HCT Input type TTL-Compatible CMOS Output type Push-Pull Clock frequency (MHz) 25 IOL (max) (mA) 6 IOH (max) (mA) -6 Supply current (max) (µA) 80 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Catalog
Configuration Parallel-in, Serial-out Bits (#) 8 Technology family HCT Input type TTL-Compatible CMOS Output type Push-Pull Clock frequency (MHz) 25 IOL (max) (mA) 6 IOH (max) (mA) -6 Supply current (max) (µA) 80 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Catalog
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm)
  • LSTTL input logic compatible
    • VIL(max) = 0.8 V, VIH(min) = 2 V
  • CMOS input logic compatible
    • II ≤ 1 µA at VOL, VOH
  • 4.5 V to 5.5 V operation
  • Supports fanout up to 10 LSTTL loads
  • Direct overriding load (data) inputs
  • Gated clock inputs
  • Extended ambient temperature range: –40°C to +125°C, TA
  • LSTTL input logic compatible
    • VIL(max) = 0.8 V, VIH(min) = 2 V
  • CMOS input logic compatible
    • II ≤ 1 µA at VOL, VOH
  • 4.5 V to 5.5 V operation
  • Supports fanout up to 10 LSTTL loads
  • Direct overriding load (data) inputs
  • Gated clock inputs
  • Extended ambient temperature range: –40°C to +125°C, TA

The SN74HCT165 is a parallel- or serial-in, serial-out 8-bit shift register. Parallel-in access to each stage is provided by eight individual direct data (A-H) inputs that are enabled by a low level at the shift/load (SH/LD) input. The SN74HCT165 also features a clock-inhibit (CLK INH) function and a complementary serial (Q H) output.

The SN74HCT165 is a parallel- or serial-in, serial-out 8-bit shift register. Parallel-in access to each stage is provided by eight individual direct data (A-H) inputs that are enabled by a low level at the shift/load (SH/LD) input. The SN74HCT165 also features a clock-inhibit (CLK INH) function and a complementary serial (Q H) output.
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* Data sheet SN74HCT165 8-Bit Parallel-Load Shift Registers datasheet (Rev. A) PDF | HTML Dec 8, 2021

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

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Simulation model

SN74HCT165 IBIS Model

SCLM343.ZIP (17 KB) - IBIS model
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TSSOP (PW) 16 Ultra Librarian
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