The SN74HCS594-Q1 device
contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type
storage register. All inputs include Schmitt-triggers, eliminating any erroneous
data outputs due to slow-edged or noisy input signals. The storage register has
parallel outputs. Separate clocks and direct overriding clear
( SRCLR, RCLR) inputs are provided for
both the shift and storage register. A serial output (Q H) is provided
for cascading.
Both the shift register (SRCLK) and
storage register (RCLK) clocks are positive edge triggered. If both clocks are
connected together, the shift register is one count pulse ahead of the storage
register.
The SN74HCS594-Q1 device
contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type
storage register. All inputs include Schmitt-triggers, eliminating any erroneous
data outputs due to slow-edged or noisy input signals. The storage register has
parallel outputs. Separate clocks and direct overriding clear
( SRCLR, RCLR) inputs are provided for
both the shift and storage register. A serial output (Q H) is provided
for cascading.
Both the shift register (SRCLK) and
storage register (RCLK) clocks are positive edge triggered. If both clocks are
connected together, the shift register is one count pulse ahead of the storage
register.