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SN74ACT564

ACTIVE

Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs

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Data sheet

SN74ACT564

ACTIVE
Data sheet Order now

Product details

Number of channels 8 Technology family ACT Input type TTL-Compatible CMOS Output type 3-State Clock frequency (max) (MHz) 90 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 40 Features Balanced outputs, Positive input clamp diode, Very high speed (tpd 5-10ns) Operating temperature range (°C) -40 to 85 Rating Catalog
Number of channels 8 Technology family ACT Input type TTL-Compatible CMOS Output type 3-State Clock frequency (max) (MHz) 90 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 40 Features Balanced outputs, Positive input clamp diode, Very high speed (tpd 5-10ns) Operating temperature range (°C) -40 to 85 Rating Catalog
SOP (NS) 20 98.28 mm² (12.6 mm × 7.8 mm) SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm) TSSOP (PW) 20 41.6 mm² (6.5 mm × 6.4 mm) PDIP (N) 20 228.702 mm² (24.33 mm × 9.4 mm)
  • Operation of 4.5V to 5.5V VCC
  • Inputs accept voltages to 5.5V
  • Max tpd of 8.5ns at 5V
  • Inputs are TTL-voltage compatible
  • 3-state inverted outputs drive bus lines directly
  • Flow-through architecture to optimize PCB layout
  • Full parallel access for loading
  • Operation of 4.5V to 5.5V VCC
  • Inputs accept voltages to 5.5V
  • Max tpd of 8.5ns at 5V
  • Inputs are TTL-voltage compatible
  • 3-state inverted outputs drive bus lines directly
  • Flow-through architecture to optimize PCB layout
  • Full parallel access for loading

The ’ACT564 devices are octal D-type edge-triggered flip-flops that feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The ’ACT564 devices are octal D-type edge-triggered flip-flops that feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
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Technical documentation

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* Data sheet SN74ACT564 Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs datasheet (Rev. D) PDF | HTML Feb 28, 2024
Application note Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML Dec 15, 2022

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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SOP (NS) 20 Ultra Librarian
SOIC (DW) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian
PDIP (N) 20 Ultra Librarian
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