Product details

Frequency (max) (MHz) 30000 Frequency (min) (MHz) 5 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Phase synchronization, Programmable output power, SYSREF support (Compliant to JESD204B standard), Space grade Current consumption (mA) 360 Integrated VCO Yes Operating temperature range (°C) to Rating Space Lock time (µs) (typ) (s) Loop BW dependent
Frequency (max) (MHz) 30000 Frequency (min) (MHz) 5 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Phase synchronization, Programmable output power, SYSREF support (Compliant to JESD204B standard), Space grade Current consumption (mA) 360 Integrated VCO Yes Operating temperature range (°C) to Rating Space Lock time (µs) (typ) (s) Loop BW dependent
HTQFP (PAP) 64 144 mm² (12 mm × 12 mm)
  • VID #V62/25658
    • Total ionizing dose 50Krad (ELDRS-free)
    • Single event latch-up (SEL) immune up to 43MeV-cm2/mg
  • Wide band frequency synthesizer : 5MHz to 30GHz output frequency
  • –102dBc/Hz phase noise at 100kHz offset with 30GHz carrier
  • 62fs RMS jitter at 30GHz (1kHz to 100MHz)
  • Programmable output power
  • PLL key specifications:
    • Figure of merit: –236dBc/Hz
    • Normalized 1/f noise: –129dBc/Hz
    • Up to 200MHz phase detector frequency in fractional mode.
  • Synchronization of output phase across multiple devices
  • Independent mute pins for RFoutA and RFoutB outputs
  • Support for SYSREF with programmable delay
  • 3.3V single power supply operation
  • Pin-mode: Pin configurable N divider and output divider in Integer PLL mode
  • 10 × 10mm² 64 lead QFP package
  • Operating temperature range: –55°C to +125°C
  • Supported by PLLatinum™ Simulator design tool
  • High Reliability
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Extended Product Life Cycle
    • Product Traceability
    • Outgassing test performed per ASTM E595
  • VID #V62/25658
    • Total ionizing dose 50Krad (ELDRS-free)
    • Single event latch-up (SEL) immune up to 43MeV-cm2/mg
  • Wide band frequency synthesizer : 5MHz to 30GHz output frequency
  • –102dBc/Hz phase noise at 100kHz offset with 30GHz carrier
  • 62fs RMS jitter at 30GHz (1kHz to 100MHz)
  • Programmable output power
  • PLL key specifications:
    • Figure of merit: –236dBc/Hz
    • Normalized 1/f noise: –129dBc/Hz
    • Up to 200MHz phase detector frequency in fractional mode.
  • Synchronization of output phase across multiple devices
  • Independent mute pins for RFoutA and RFoutB outputs
  • Support for SYSREF with programmable delay
  • 3.3V single power supply operation
  • Pin-mode: Pin configurable N divider and output divider in Integer PLL mode
  • 10 × 10mm² 64 lead QFP package
  • Operating temperature range: –55°C to +125°C
  • Supported by PLLatinum™ Simulator design tool
  • High Reliability
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Extended Product Life Cycle
    • Product Traceability
    • Outgassing test performed per ASTM E595

The LMX2695-SEP is a high performance wideband phase-locked loop (PLL) with integrated voltage controlled oscillator (VCO) that can output any frequency from 5MHz to 30GHz. The VCO on this device covers an entire octave so the frequency coverage is complete down to 5MHz. The high performance PLL with a figure of merit of –236dBc/Hz and high phase detector frequency can attain very low in-band noise and integrated jitter.

The LMX2695-SEP allows users to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in use cases including the one with fractional engine or output divider enabled. The device also adds support for either generating or repeating SYSREF (compliant to JESD204B/C standard), making the device designed for low-noise clock source for high-speed data converters.

This device is fabricated in Texas Instruments’ advanced BiCMOS process and is available in a 64-lead QFP plastic package.

The LMX2695-SEP is a high performance wideband phase-locked loop (PLL) with integrated voltage controlled oscillator (VCO) that can output any frequency from 5MHz to 30GHz. The VCO on this device covers an entire octave so the frequency coverage is complete down to 5MHz. The high performance PLL with a figure of merit of –236dBc/Hz and high phase detector frequency can attain very low in-band noise and integrated jitter.

The LMX2695-SEP allows users to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in use cases including the one with fractional engine or output divider enabled. The device also adds support for either generating or repeating SYSREF (compliant to JESD204B/C standard), making the device designed for low-noise clock source for high-speed data converters.

This device is fabricated in Texas Instruments’ advanced BiCMOS process and is available in a 64-lead QFP plastic package.

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Technical documentation

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* Data sheet LMX2695-SEP 5MHz to 30GHz Wideband Synthesizer With Phase Synchronization and JESD204B/C Support datasheet PDF | HTML Jul 20, 2026
Selection guide TI Space Products (Rev. L) Mar 27, 2026

Design & development

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Evaluation board

LMX2695SEPEVM — LMX2695-SEP evaluation module

The LMX2695SEPEVM is used to evaluate the performance of the LMX2695-SEP device. This device is a radiation-hardened RF synthesizer in 10mm × 10mm 64-pin plastic package. This device is able to generate continuous wave signals up to 28GHz. The evaluation module provides all the hardware interface (...)
User guide: PDF | HTML
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PLLATINUMSIM-SW — PLL loop filter, phase noise, lock time, and spur simulation tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

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HTQFP (PAP) 64 Ultra Librarian

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