The CY29FCT52T has two 8-bit back-to-back registers that store data flowing in both directions between two bidirectional buses. Separate clock, clock enable, and 3-state output-enable signals are provided for each register. Both A outputs and B outputs are specified to sink 64 mA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | 8-Bit Registered Transceiver datasheet (Rev. A) | Nov 21, 2000 | |
| * | User guide | CYFCT Parameter Measurement Information | Apr 2, 2001 |
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The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SSOP (DBQ) | 24 | Ultra Librarian |
| SOIC (DW) | 24 | Ultra Librarian |
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