The CD74HC4017 is a high-speed silicon-gate CMOS 5-stage Johnson counter with ten decoded outputs. Each of the decoded outputs normally is low and sequentially goes high on the low-to-high transition clock period of the ten-clock-period cycle. The carry (TC) output transitions low to high after output 9 goes from high to low, and can be used in conjunction with the clock enable (CE) input to cascade several stages. CE disables counting when in the high state. A master reset (MR) input also is provided that, when taken high, sets all the decoded outputs, except output 0, to low.
The device can drive up to ten low-power Schottky equivalent loads.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | High-Speed CMOS Logic Decade Counter/Divider With 10 Decoded Outputs datasheet (Rev. A) | Apr 15, 2008 | |
| More literature | Automotive Logic Devices Brochure | Aug 27, 2014 |
For additional terms or required resources, click any title below to view the detail page where available.
The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,
This reference design showcases an interleaved boost converter controlled by LM5122-Q1, operating from a 9.0-V to 16.0-V input voltage range, generating an output voltage of 24.0 V with a maximum load current of 60.0 A (10.0 A per phase).
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| TSSOP (PW) | 16 | Ultra Librarian |
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.