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ADC3664-SEP

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Radiation-tolerant, 30-krad, 18-bit, dual 125-MSPS ADC

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Data sheet

ADC3664-SEP

ACTIVE
Data sheet Order now

Product details

Sample rate (max) (Msps) 125 Resolution (Bits) 14 Number of input channels 2 Interface type Serial LVDS Analog input BW (MHz) 200 Features Bypass Mode, Decimating Filter, Differential Inputs, Dual Channel, High Dynamic Range, High Performance, Internal Reference, LVDS interface, Low latency, Low power Rating Space Peak-to-peak input voltage range (V) 3.2 Power consumption (typ) (mW) 200 Architecture SAR SNR (dB) 78 ENOB (Bits) 12.6 SFDR (dB) 84 Operating temperature range (°C) -55 to 105 Radiation, TID (typ) (krad) 30 Radiation, SEL (MeV·cm2/mg) 43
Sample rate (max) (Msps) 125 Resolution (Bits) 14 Number of input channels 2 Interface type Serial LVDS Analog input BW (MHz) 200 Features Bypass Mode, Decimating Filter, Differential Inputs, Dual Channel, High Dynamic Range, High Performance, Internal Reference, LVDS interface, Low latency, Low power Rating Space Peak-to-peak input voltage range (V) 3.2 Power consumption (typ) (mW) 200 Architecture SAR SNR (dB) 78 ENOB (Bits) 12.6 SFDR (dB) 84 Operating temperature range (°C) -55 to 105 Radiation, TID (typ) (krad) 30 Radiation, SEL (MeV·cm2/mg) 43
WQFN (RSB) 40 25 mm² 5 x 5
  • Radiation tolerant (-SEP only):
    • Single-event latch-up (SEL) immune up to LET = 43 MeV-cm2/mg
    • Single-event functional interrupt (SEFI) characterized up to LET = 43 MeV-cm2/mg
    • Total ionizing dose (TID): 30krad(Si)
  • Enhanced product (-EP and -SEP):
    • Meets ASTM E595 outgassing specification
    • Vendor item drawing (VID)
    • Temperature range: –55°C to 105°C
    • One fabrication, assembly, and test site
    • Gold bond wire, NiPdAu lead finish
    • Wafer lot traceability
    • Extended product life cycle
  • Dual channel, 125MSPS ADC
  • 14-bit resolution (no missing codes)
  • Noise floor: –156.9dBFS/Hz
  • Low power consumption: 100mW/ch (at 125MSPS)
  • Latency: 2 clock cycles
  • Voltage reference options:
    • External: 1 to 125MSPS
    • Internal: 100 to 125MSPS
  • Input bandwidth: 200MHz (3dB)
  • INL: ±2.6 LSB; DNL: ±0.9 LSB (typical)
  • On-chip DSP (optional/bypassable)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • Serial LVDS digital interface (2-, 1- and 1/2-wire)
  • Small Footprint: 40 QFN (5 × 5mm) package
  • Spectral performance (fIN = 5MHz):
    • SNR: 77.5dBFS
    • SFDR: 84dBc HD2, HD3
    • SFDR: 92dBFS worst spur
  • Radiation tolerant (-SEP only):
    • Single-event latch-up (SEL) immune up to LET = 43 MeV-cm2/mg
    • Single-event functional interrupt (SEFI) characterized up to LET = 43 MeV-cm2/mg
    • Total ionizing dose (TID): 30krad(Si)
  • Enhanced product (-EP and -SEP):
    • Meets ASTM E595 outgassing specification
    • Vendor item drawing (VID)
    • Temperature range: –55°C to 105°C
    • One fabrication, assembly, and test site
    • Gold bond wire, NiPdAu lead finish
    • Wafer lot traceability
    • Extended product life cycle
  • Dual channel, 125MSPS ADC
  • 14-bit resolution (no missing codes)
  • Noise floor: –156.9dBFS/Hz
  • Low power consumption: 100mW/ch (at 125MSPS)
  • Latency: 2 clock cycles
  • Voltage reference options:
    • External: 1 to 125MSPS
    • Internal: 100 to 125MSPS
  • Input bandwidth: 200MHz (3dB)
  • INL: ±2.6 LSB; DNL: ±0.9 LSB (typical)
  • On-chip DSP (optional/bypassable)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • Serial LVDS digital interface (2-, 1- and 1/2-wire)
  • Small Footprint: 40 QFN (5 × 5mm) package
  • Spectral performance (fIN = 5MHz):
    • SNR: 77.5dBFS
    • SFDR: 84dBc HD2, HD3
    • SFDR: 92dBFS worst spur

The ADC3664-xEP device is a low-noise, ultra-low power, 14-bit, 125MSPS, high-speed dual channel ADC. Designed for lowest noise performance, the device delivers a noise spectral density of -156.9dBFS/Hz combined with linearity and dynamic range. The ADC3664-xEP offers IF sampling support which makes the device designed for a wide range of applications. High-speed control loops benefit from the short latency as low as one clock cycle. The ADC consumes only 100mW/ch at 125MSPS, and the power consumption scales well with lower sampling rates.

The ADC3664-xEP uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports a two-lane, one-lane and half-lane option. The device supports an extended temperature range from –55°C to +105°C.

The ADC3664-xEP device is a low-noise, ultra-low power, 14-bit, 125MSPS, high-speed dual channel ADC. Designed for lowest noise performance, the device delivers a noise spectral density of -156.9dBFS/Hz combined with linearity and dynamic range. The ADC3664-xEP offers IF sampling support which makes the device designed for a wide range of applications. High-speed control loops benefit from the short latency as low as one clock cycle. The ADC consumes only 100mW/ch at 125MSPS, and the power consumption scales well with lower sampling rates.

The ADC3664-xEP uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports a two-lane, one-lane and half-lane option. The device supports an extended temperature range from –55°C to +105°C.
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Type Title Date
* Data sheet ADC3664-SEP ADC3664-EP 14-Bit, 125MSPS, Low Noise, Low Power Dual Channel ADC datasheet PDF | HTML 07 Apr 2025
* Radiation & reliability report ADC3664-SEP Single Event Effects Report PDF | HTML 25 Mar 2025
* Radiation & reliability report ADC3664-SEP Production Flow and Reliability Report PDF | HTML 19 Mar 2025
* Radiation & reliability report ADC3664-SEP Total Ionizing Dose (TID) Radiation Report 19 Mar 2025

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ADC3664EVMCVAL — ADC3664-SP evaluation module

The ADC3664 evaluation module (EVM) is designed to evaluate the ADC3664-SP high-speed analog-to-digital converter (ADC). The EVM is populated with the ADC3664-SP, an 18-bit, dual-channel 125MSPS ADC with serial LVDS interface.
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