SN54AS823A

Name: SN54AS823A
Brand: TI
SKU: SN54AS823A
Price: 29.287 USD

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具有三态输出的 9 位总线接口触发器

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数据表

document-pdfAcrobat 9-Bit Bus Interface Flip-Flops With 3-State Outputs 数据表 (Rev. A) (英语)

SN54AS823A

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数据表

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产品详情

Number of channels

9

Technology family

AS

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

Bipolar

Output type

3-State

Clock frequency (max) (MHz)

125

IOL (max) (mA)

48

IOH (max) (mA)

-24

Supply current (max) (µA)

103000

Features

High speed (tpd 10-50ns)

Operating temperature range (°C)

-55 to 125

Rating

Military

Number of channels

9

Technology family

AS

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

Bipolar

Output type

3-State

Clock frequency (max) (MHz)

125

IOL (max) (mA)

48

IOH (max) (mA)

-24

Supply current (max) (µA)

103000

Features

High speed (tpd 10-50ns)

Operating temperature range (°C)

-55 to 125

Rating

Military

CDIP (JT)

24

221.44 mm² 32 x 6.92

Functionally Equivalent to AMD's AM29823 and AM29824
Provide Extra Data Width Necessary for Wider Address/Data Paths or Buses With Parity
Outputs Have Undershoot-Protection Circuitry
Power-Up High-Impedance State
Buffered Control Inputs to Reduce dc Loading Effects
Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs

Functionally Equivalent to AMD's AM29823 and AM29824
Provide Extra Data Width Necessary for Wider Address/Data Paths or Buses With Parity
Outputs Have Undershoot-Protection Circuitry
Power-Up High-Impedance State
Buffered Control Inputs to Reduce dc Loading Effects
Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs

These 9-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers, parity bus interfacing, and working registers.

With the clock-enable () input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock (CLK) input. Taking high disables the clock buffer, latching the outputs. The SN54AS823A and SN74AS823A have noninverting data (D) inputs and the SN74AS824A has inverting (D\) inputs. Taking the clear () input low causes the nine Q outputs to go low independently of the clock.

A buffered output-enable () input can be used to place the nine outputs in either a normal logic state (high or low logic level) or the high-
impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN54AS823A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AS823A and SN74AS824A are characterized for operation from 0°C to 70°C.

These 9-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers, parity bus interfacing, and working registers.

With the clock-enable () input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock (CLK) input. Taking high disables the clock buffer, latching the outputs. The SN54AS823A and SN74AS823A have noninverting data (D) inputs and the SN74AS824A has inverting (D\) inputs. Taking the clear () input low causes the nine Q outputs to go low independently of the clock.

A buffered output-enable () input can be used to place the nine outputs in either a normal logic state (high or low logic level) or the high-
impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN54AS823A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AS823A and SN74AS824A are characterized for operation from 0°C to 70°C.

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