TLV5619
12-Bit, Single Channel DAC, Parallel, Voltage Out, Low Power, Asynchronous Update
TLV5619
- Single Supply 2.7-V to 5.5-V Operation
- ±0.4 LSB Differential Nonlinearity (DNL),
±1.5 LSB Integral Nonlinearity (INL) - 12-Bit Parallel Interface
- Compatible With TMS320 DSP
- Internal Power On Reset
- Settling Time 1 µs Typ
- Low Power Consumption:
- 8 mW for 5-V Supply
- 4.3 mW for 3-V Supply
- Reference Input Buffers
- Voltage Output
- Monotonic Over Temperature
- Asynchronous Update
- APPLICATIONS
- Battery Powered Test Instruments
- Digital Offset and Gain Adjustment
- Battery Operated/Remote Industrial Controls
- Machine and Motion Control Devices
- Cordless and Wireless Telephones
- Speech Synthesis
- Communication Modulators
- Arbitrary Waveform Generation
The TLV5619 is a 12-bit voltage output DAC with a microprocessor and TMS320 compatible parallel interface. The 12 data bits are double buffered so that the output can be updated asynchronously using the LDAC\ pin. During normal operation, the device dissipates 8 mW at a 5-V supply and 4.3 mW at a 3-V supply. The power consumption can be lowered to 50 nW by setting the DAC to power-down mode.
The output voltage is buffered by a ×2 gain rail-to-rail amplifier, which features a Class A output stage to improve stability and reduce settling time.
Technical documentation
Type | Title | Date | ||
---|---|---|---|---|
* | Data sheet | TLV5619 - 2.7 V To 5.5 V 12-Bit Parallel DAC With Power Down datasheet (Rev. F) | 29 Feb 2004 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
ANALOG-ENGINEER-CALC — Analog engineer's calculator
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
TINA-TI — SPICE-based analog simulation program
Package | Pins | CAD symbols, footprints & 3D models |
---|---|---|
SOIC (DW) | 20 | Ultra Librarian |
TSSOP (PW) | 20 | Ultra Librarian |
Ordering & quality
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Support & training
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