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SN74S1051

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12-Bit Schottky Barrier Diode Bus-Termination Array

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Data sheet

SN74S1051

ACTIVE
Data sheet Order now

Product details

Technology family S Bits (#) 12 Rating Catalog Operating temperature range (°C) 0 to 70
Technology family S Bits (#) 12 Rating Catalog Operating temperature range (°C) 0 to 70
PDIP (N) 16 181.42 mm² (19.3 mm × 9.4 mm) SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm) SOP (NS) 16 79.56 mm² (10.2 mm × 7.8 mm) TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm)
  • Designed to Reduce Reflection Noise
  • Repetitive Peak Forward Current to 200 mA
  • 12-Bit Array Structure Suited for Bus-Oriented Systems
  • Designed to Reduce Reflection Noise
  • Repetitive Peak Forward Current to 200 mA
  • 12-Bit Array Structure Suited for Bus-Oriented Systems

This Schottky barrier diode bus-termination array is designed to reduce reflection noise on memory bus lines. This device consists of a 12-bit high-speed Schottky diode array suitable for clamping to VCC and/or GND.

This Schottky barrier diode bus-termination array is designed to reduce reflection noise on memory bus lines. This device consists of a 12-bit high-speed Schottky diode array suitable for clamping to VCC and/or GND.
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* Data sheet SN74S1051 datasheet (Rev. B) Feb 21, 2003

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