Home Logic & voltage translation Buffers, drivers & transceiver Inverting buffers & drivers
Home
Logic & voltage translation
Buffers, drivers & transceiver
Inverting buffers & drivers

SN74LVCZ240A

ACTIVE

8-ch, 2.7-V to 3.6-V inverters with 3-state outputs

Order now
Data sheet

SN74LVCZ240A

ACTIVE
Data sheet Order now

Product details

Technology family LVC Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 100 Input type Standard CMOS Output type 3-State Features Balanced outputs, Damping resistors, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family LVC Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 100 Input type Standard CMOS Output type 3-State Features Balanced outputs, Damping resistors, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (PW) 20 41.6 mm² (6.5 mm × 6.4 mm) SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm) SOP (NS) 20 98.28 mm² (12.6 mm × 7.8 mm)
  • Operates from 2.7V to 3.6V
  • Inputs accept voltages to 5.5V
  • Maximum tpd of 6.5ns at 3.3V
  • Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) > 2V at VCC = 3.3V, TA = 25°C
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Supports Mixed-Mode Signal Operation on All Ports (5V Input/Output Voltage With 3.3V VCC)
  • Latch-up performance exceeds 100mA per JESD 78
  • Operates from 2.7V to 3.6V
  • Inputs accept voltages to 5.5V
  • Maximum tpd of 6.5ns at 3.3V
  • Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) > 2V at VCC = 3.3V, TA = 25°C
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Supports Mixed-Mode Signal Operation on All Ports (5V Input/Output Voltage With 3.3V VCC)
  • Latch-up performance exceeds 100mA per JESD 78

The SN74LVCZ240A is an octal buffer with 3-state outputs. The device is configured into two banks of four drivers, each controlled by an output enable pin.

The SN74LVCZ240A is an octal buffer with 3-state outputs. The device is configured into two banks of four drivers, each controlled by an output enable pin.
filter Find other Inverting buffers & drivers
Download View video with transcript Video

Technical documentation

No results found. Please clear your search and try again.
View all 1
Top documentation Type Title Format options Date
* Data sheet SN74LVCZ240A Octal Buffer with Power-up 3-State Outputs datasheet (Rev. I) PDF | HTML Jun 25, 2026

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Supported products & hardware
In stock
Limit:
??asset.out-of-stock-ti_en_US??
Not available
Simulation model

SN74LVCZ240A IBIS Model

SCEM420.ZIP (29 KB) - IBIS model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 20 Ultra Librarian
SOIC (DW) 20 Ultra Librarian
SOP (NS) 20 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos