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XOR (exclusive OR) gates

SN74LS136

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4-ch, 2-input, 4.75-V to 5.25-V bipolar XOR (exclusive OR) gates with open-collector outputs

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Data sheet

SN74LS136

ACTIVE
Data sheet Order now

Product details

Technology family LS Number of channels 4 Inputs per channel 2 IOL (max) (mA) 16 Input type Bipolar IOH (max) (mA) 0 Output type Open-collector Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 35 Rating Catalog Operating temperature range (°C) 0 to 70
Technology family LS Number of channels 4 Inputs per channel 2 IOL (max) (mA) 16 Input type Bipolar IOH (max) (mA) 0 Output type Open-collector Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 35 Rating Catalog Operating temperature range (°C) 0 to 70
SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) PDIP (N) 14 181.42 mm² (19.3 mm × 9.4 mm)
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Technical documentation

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* Data sheet Quadruple 2-Input Exclusive-OR Gates With Open-Collector Outputs datasheet Mar 1, 1988

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

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Simulation model

SN74LS136 Behavioral SPICE Model

SDLM045.ZIP (6 KB) - PSpice model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
SOP (NS) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
PDIP (N) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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