This octal bus transceiver is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | SN74ALVCH245 datasheet (Rev. G) | Aug 20, 2004 | |
| Application note | An Overview of Bus-Hold Circuit and the Applications (Rev. B) | Sep 17, 2018 |
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The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOIC (DW) | 20 | Ultra Librarian |
| TSSOP (PW) | 20 | Ultra Librarian |
| TVSOP (DGV) | 20 | Ultra Librarian |
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