This verified design is a high performance data acquisition system (DAQ) using an 18-bit SAR ADC, ADS8881 at a throughput of 1MSPS. This design has been optimized to provide the lowest power solution for a full scale input sine wave of 10 KHz. At a total power consumption of less than 35mW, this design has been optimized to achieve an effective resolution greater than 16 bits. The input driver for the ADC uses the OPA320 for low power, low noise and linear rail-to-rail input and output operation. The reference buffer drive utilizes a composite buffer made out of THS4281 & OPA333 to get the desired performance at lowest power consumption.
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
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Complete listing of design components, reference designators, and manufacturers/part numbers
Design file that contains information on physical board layer of design PCB
Detailed schematic diagram for design layout and components
Detailed schematic diagram for design layout and components
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| User guide | 18-Bit, 1-MSPS Data Acquisition (DAQ) Block Optimized for Lowest Power (Rev. C) | Feb 17, 2017 |
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