TXG8041-Q1
- Supports DC shifts up to ±80V
- AC Noise Rejection of 140VPP up to 1MHz
- CMTI of 250V/µs
- Low Prop Delay (<5ns) and Ch-Ch Skew (0.35ns)
- Greater than 250Mbps
- Low power consumption (0.65mA per channel at 1Mbps, 1.8V)
- Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
- 4, 2, 1 channel devices with multiple configurations will be available
- Two device variants:
- TXG8041-Q1: 3 forward, 1 reverse
- TXG8042-Q1: 2 forward, 2 reverse
- Supports VCC disconnect feature (I/Os are forced into high-Z)
- Schmitt-trigger inputs allows for slow and noisy signals
- Inputs with integrated static pull-down resistors prevent channels from floating
- Operating temperature from –40°C to +125°C
- Latch-up performance exceeds 100mA per JESD 78, class II
- ESD protection exceeds JESD 22
- 4000V human-body model
- 500V charged-device model
- Package options provided:
- DYY (SOT-14)
- DBQ (QSOP-16)
The TXG804x-Q1 is a 4-bit, fixed direction, non-galvanic based voltage and ground-level translator that supports both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±80V. Compared to traditional level shifters, the TXG804x-Q1 family solves the challenges of voltage translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to parasitic resistance or capacitance.
VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic level while Bx pins are referenced to VCCB logic levels. Both A port and B port accept voltages from 1.71V to 5.5V. This device includes two enable pins that place the respective outputs in a high-impedance state when the OE pin is connected to GND or left floating. In the event of input power or signal loss, the output is default low when OE is High (refer to ). The leakage between GNDA and GNDB is 70nA when VCC to GND is shorted.
The TXG804x-Q1 device helps improve noise immunity and power sequencing across different ground domains while providing low power consumption, latency, and channel-to-channel skew. TXG804x-Q1 supresses noise levels of 140PP up to 1MHz (Figure 7-4). This device supports multiple interfaces such as SPI, UART, GPIO, and I2S.
技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | TXG804x-Q1 4-bit , ± 80V Ground-Level Translator 数据表 | PDF | HTML | 2025年 5月 12日 | ||
技术文章 | 地面不平?使用全新的接地电平转换器解决失调电压挑战 (Rev. A) | PDF | HTML | 英语版 (Rev.A) | PDF | HTML | 2025年 6月 5日 | |
技术文章 | 接地電位不均?以新型的接地電平轉換器解決偏移挑戰 (Rev. A) | PDF | HTML | 2025年 6月 5日 | |||
技术文章 | 접지가 불안정하신가요? 새로운 접지 레벨 트랜스레이터로 오 프셋 문제를 해결하세요. (Rev. A) | PDF | HTML | 2025年 6月 5日 | |||
应用简报 | Not All Grounds Are 0V | PDF | HTML | 2025年 5月 21日 | |||
产品概述 | TI's Latest Ground-Level Translators | PDF | HTML | 2025年 5月 7日 | |||
EVM 用户指南 | TXGx04x 4-Channel Ground-Level Translator Evaluation Module | PDF | HTML | 2025年 5月 6日 |
设计和开发
如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。
14-24-LOGIC-EVM — 采用 14 引脚至 24 引脚 D、DB、DGV、DW、DYY、NS 和 PW 封装的逻辑产品通用评估模块
14-24-LOGIC-EVM 评估模块 (EVM) 设计用于支持采用 14 引脚至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。
TXG-4CH-EVM — 4 通道接地电平转换器的 TXG 评估模块
封装 | 引脚 | CAD 符号、封装和 3D 模型 |
---|---|---|
SOT-23-THN (DYY) | 14 | Ultra Librarian |
SSOP (DBQ) | 16 | Ultra Librarian |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
- 制造厂地点
- 封装厂地点