Product details

Number of channels 2 Output type Open-collector, Open-drain Propagation delay time (µs) 0.65 Vs (max) (V) 8 Vs (min) (V) 2 Rating Catalog Iq per channel (typ) (mA) 0.07 Vos (offset voltage at 25°C) (max) (mV) 5 Rail-to-rail In to V- Operating temperature range (°C) -40 to 85 Input bias current (±) (max) (nA) 2 VICR (max) (V) 7 VICR (min) (V) 0
Number of channels 2 Output type Open-collector, Open-drain Propagation delay time (µs) 0.65 Vs (max) (V) 8 Vs (min) (V) 2 Rating Catalog Iq per channel (typ) (mA) 0.07 Vos (offset voltage at 25°C) (max) (mV) 5 Rail-to-rail In to V- Operating temperature range (°C) -40 to 85 Input bias current (±) (max) (nA) 2 VICR (max) (V) 7 VICR (min) (V) 0
PDIP (P) 8 92.5083 mm² 9.81 x 9.43 SOIC (D) 8 29.4 mm² 4.9 x 6 TSSOP (PW) 8 19.2 mm² 3 x 6.4
  • Wide range of supply voltages: 2V to 8V
  • Wide range of supply voltages: 2.7V to 8V (TLV2352IDR and TLV2352IPWR only)
  • Fully characterized at 3V and 5V
  • Very-low supply-current drain: 120µA typical at 3V
  • Output compatible with TTL, MOS, and CMOS
  • Fast response time: 200ns typical for TTL-level input step
  • High input impedance: 1012Ω typical
  • Extremely low input bias current: 5pA typical
  • Common-mode input voltage range includes ground
  • Built-in ESD protection
  • Wide range of supply voltages: 2V to 8V
  • Wide range of supply voltages: 2.7V to 8V (TLV2352IDR and TLV2352IPWR only)
  • Fully characterized at 3V and 5V
  • Very-low supply-current drain: 120µA typical at 3V
  • Output compatible with TTL, MOS, and CMOS
  • Fast response time: 200ns typical for TTL-level input step
  • High input impedance: 1012Ω typical
  • Extremely low input bias current: 5pA typical
  • Common-mode input voltage range includes ground
  • Built-in ESD protection
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Technical documentation

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* Data sheet TLV2352 Dual Low-Voltage Differential Comparators datasheet (Rev. D) PDF | HTML 22 Jul 2025
E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 Mar 2017

Design & development

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Evaluation board

AMP-PDK-EVM — Amplifier performance development kit evaluation module

The amplifier performance development kit (PDK) is an evaluation module (EVM) kit to test common operational amplifier (op amp) parameters and is compatible with most op amps and comparators. The EVM kit offers a main board with several socketed daughtercard options to fit package needs, allowing (...)

User guide: PDF | HTML
Simulation model

TLV2352 PSpice Model

SLCJ030.ZIP (1 KB) - PSpice Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
User guide: PDF
Package Pins CAD symbols, footprints & 3D models
PDIP (P) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian
TSSOP (PW) 8 Ultra Librarian

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