) IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
VelociTI is a trademark of Texas Instruments Incorporated.
Motorola is a trademark of Motorola, Inc.
TI is a trademark of Texas Instruments Incorporated.
Windows is a registered trademark of the Microsoft Corporation.
The SMJ320C67x DSPs are the floating-point DSP family in the SMJ320C6000 platform. The SMJ320C6701 (’C6701) device is based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI™), making this DSP an excellent choice for multichannel and multifunction applications. With performance of up to 1 giga floating-point operations per second (GFLOPS) at a clock rate of 167 MHz, the ’C6701 offers cost-effective solutions to high-performance DSP programming challenges. The ’C6701 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. This processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide four floating-/fixed-point ALUs, two fixed-point ALUs, and two floating-/fixed-point multipliers. The ’C6701 can produce two multiply-accumulates (MACs) per cycle for a total of 334 million MACs per second (MMACS). The ’C6701 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals.
The ’C6701 includes a large bank of on-chip memory and has a powerful and diverse set of peripherals. Program memory consists of a 64K-byte block that is user-configurable as cache or memory-mapped program space. Data memory consists of two 32K-byte blocks of RAM. The peripheral set includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals.
The ’C6701 has a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows. debugger interface for visibility into source code execution.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | Floating-Point Digital Signal Processor datasheet (Rev. A) | 27 Jul 2009 | |
| Application note | Introduction to TMS320C6000 DSP Optimization | 06 Oct 2011 | ||
| More literature | SMJ320C6701/5962-9866101QXA (Rev. M) | 03 May 2002 | ||
| More literature | Military C6000 DSPs (Rev. A) | 08 May 2000 |
For additional terms or required resources, click any title below to view the detail page where available.
The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).
All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)
The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).
All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)
Lauterbach‘s TRACE32® tools are a suite of leading-edge hardware and software components that enables developers to analyze, optimize and certify all kinds of single- or multi-core Digital Signal processors (DSPs) which are a popular choice for audio and video processing as well as radar data (...)
Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)
TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
TMS320C6000 Digital Signal Processor Library (DSPLIB) is a platform-optimized DSP function library for C programmers. It includes C-callable, general-purpose signal-processing routines that are typically used in computationally intensive real-time applications. With these routines, higher (...)
Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)
Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| CFCBGA (GLP) | 429 | Ultra Librarian |
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If you have questions about quality, packaging or ordering TI products, see TI support.
FAXLIB for C66x Windows Installer
FAXLIB for C66x Linux Installer
FAXLIB for C64x+ Windows Installer
FAXLIB for C64x+ Linux Installer
FAXLIB for C55x Windows Installer
FAXLIB for C55x Linux Installer
FAXLIB for C55x CPU Rev 3 Windows Installer
FAXLIB for C55x CPU Rev 3 Linux Installer
FAXLIB Fact Sheet
FAXLIB C55x Users Manual
FAXLIB C64x+ Users Manual
FAXLIB C66x Users Manual
This is a GA release of the FAX Library (FAXLIB) for C55x/C64x+/C66x processors.
The Fax Library provides components that allow a development team to reduce time-to-market by providing the major building blocks of a fax relay processing system. The library contains reliable field-hardened fax relay processing software. The deliverables in this release include, a Windows and Linux installation executable for both the C55x and C6x DSP processing cores. Each executable installs a component package repository, a documentation directory, an Example directory, an Eclipse plugin directory and an expanded component directory structure with all component libraries, header files and test examples. The FAXLIB User Manual below provides additional information regarding this release.AER for C55x Windows Installer
AER for C55x Linux Installer
AER for C55x CPU V3.3 Windows Installer
AER for C55x CPU V3.3 Linux Installer
AER for C64x+/c674x (Big and Little Endian) Windows Installer
AER for C64x+/c674x (Big and Little Endian) Linux Installer
AER for Cortex-A8 Softfp Windows Installer
AER for Cortex-A8 Softfp Linux Installer
AER for Cortex-A8 Hardfp Windows Installer
AER for Cortex-A8 Hardfp Linux Installer
AER Fact Sheet
Beamforming white paper
AER Installation Guide
AER User's Manual
AER Software Manifest
The Acoustic Echo Cancellation/Removal (AER) removes or minimizes acoustic echo that is
generated by the coupling between the speaker and the microphone of a phone or similar device, particularly in hands-free mode. The primary purposes of the AER are:VoLIB for C66x Windows Installer
VoLIB for C66x Linux Installer
VoLIB for C64x+ Windows Installer
VoLIB for C64x+ Linux Installer
VoLIB for C55x Windows Installer
VoLIB for C55x Linux Installer
VoLIB for C55x CPU Rev 3 Windows Installer
VoLIB for C55x CPU Rev 3 Linux Installer
VoLIB Fact Sheet
VoLIB C55x Users Manual
VoLIB C64x+ Users Manual
VoLIB C66x Users Manual
This is a GA release of the Voice Library (VoLIB) for the C55x, C64x+ and C66x processor families.
The Voice Library provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be acquired from TI separately ( link ), the components of VoLIB satisfy most of the fundamental building blocks required to develop a complete VoIP signal processing chain. The deliverables in this release include, a Windows and Linux installation executable for the C55x, C64x+ and C66x DSP processing cores. Each executable installs a component package repository, a documentation directory, an Eclipse plugin directory and an expanded component directory structure with all component libraries, header files and test examples. The VoLIB Fact Sheet below provides additional details regarding this release.Software Defects
A list of tracked software defects can be found here. (Note: If prompted for login/password, close the window and try the link again)