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DP83TD555J-Q1

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10BASE-T1S SPI-PHY with integrated MAC

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Data sheet

DP83TD555J-Q1

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Data sheet Order now

Product details

Datarate (Mbps) 10BASE-T1S Interface type SPI Rating Automotive Number of ports Single Features IEEE 1588v2/802.1AS time synchronization, IEEE 802.3cg, Single supply, TC10, Wettable flank package I/O supply voltage (typ) (V) 1.8, 2.5, 3.3 Operating temperature range (°C) -40 to 125
Datarate (Mbps) 10BASE-T1S Interface type SPI Rating Automotive Number of ports Single Features IEEE 1588v2/802.1AS time synchronization, IEEE 802.3cg, Single supply, TC10, Wettable flank package I/O supply voltage (typ) (V) 1.8, 2.5, 3.3 Operating temperature range (°C) -40 to 125
— (—) — See data sheet
  • IEEE 802.3cg compliant 10Mbps 10BASE-T1S
    • Multidrop or point-to-point half-duplex
    • Supports >25m cable and >16 nodes depending on channel
  • Host controller interface: OA TC10, TC14 compliant SPI up to 25MHz
  • Integtrated IEEE 802.3 half-duplex MAC with Ethertype, VLAN, and DMAC ingress filtering
  • AEC-Q100 qualified for automotive applications:
    • Temperature: –40 to 125°C, TA (grade 1)
  • Physical Layer Collision Avoidance (PLCA) with burst mode support
  • TSN with IEEE 802.1AS
  • Remote PHY GPIO control
  • Single supply operation from 3.3V with 1.8/2.5/3.3V options for I/O voltage
  • OA TC10 local and remote wake-up support
    • Low power wake pins: VBAT, WAKE and INH
    • OA compliant ultra-low sleep current
    • 12/24/48V direct VBAT support
  • OA TC14 PHY features:
    • Topology discovery
    • Signal Quality Indicator (SQI)
    • Harness Defect Detection (HDD)
  • Robust PHY architecture with protection and fault detection features
    • Bus wires short to GND or 48V VBAT protection
    • Overtemperature, undervoltage detection
    • ±8kV HBM ESD for MDI pins
    • ±8kV ISO10605 /IEC61000-4-2 ESD contact discharge on MDI pins
    • Extended CMV support for MDI pins
    • OA PMA, PCS, PLCA, and EMC compliant
  • IEEE 802.3cg compliant 10Mbps 10BASE-T1S
    • Multidrop or point-to-point half-duplex
    • Supports >25m cable and >16 nodes depending on channel
  • Host controller interface: OA TC10, TC14 compliant SPI up to 25MHz
  • Integtrated IEEE 802.3 half-duplex MAC with Ethertype, VLAN, and DMAC ingress filtering
  • AEC-Q100 qualified for automotive applications:
    • Temperature: –40 to 125°C, TA (grade 1)
  • Physical Layer Collision Avoidance (PLCA) with burst mode support
  • TSN with IEEE 802.1AS
  • Remote PHY GPIO control
  • Single supply operation from 3.3V with 1.8/2.5/3.3V options for I/O voltage
  • OA TC10 local and remote wake-up support
    • Low power wake pins: VBAT, WAKE and INH
    • OA compliant ultra-low sleep current
    • 12/24/48V direct VBAT support
  • OA TC14 PHY features:
    • Topology discovery
    • Signal Quality Indicator (SQI)
    • Harness Defect Detection (HDD)
  • Robust PHY architecture with protection and fault detection features
    • Bus wires short to GND or 48V VBAT protection
    • Overtemperature, undervoltage detection
    • ±8kV HBM ESD for MDI pins
    • ±8kV ISO10605 /IEC61000-4-2 ESD contact discharge on MDI pins
    • Extended CMV support for MDI pins
    • OA PMA, PCS, PLCA, and EMC compliant

The DP83TD555J-Q1 is an IEEE802.3cg 10BASE-T1S and Open Alliance (OA) TC10, TC14 compliant Serial Peripheral Interface (SPI) MAC-PHY Ethernet transceiver. The device supports 10Mbps multi-drop or point-to-point half-duplex communication over unshielded twisted pair cables with extended common mode voltage tolerance. The device communicates to a host controller or switch using OA SPI.

The DP83TD555J-Q1 integrates IEEE802.3 Media Access Controller (MAC) that enables microcontrollers with SPI to seamlessly connect to Ethernet networks using the 10BASE-T1S bus.

The DP83TD555J-Q1 incorporates TC10 wake/sleep features to enable efficient system-level power consumption. The device supports remote wake-up over the Ethernet data line. When a wake-up event is detected, the DP83TD555J-Q1 initiates system start-up by driving INH high. The device also integrates IEEE 1588v2 /802.1AS to enable accurate time synchronization and hardware timestamping for time-critical automotive and industrial applications.

The DP83TD555J-Q1 is equipped with diagnostic features such as cable fault detection, undervoltage and overtemperature monitoring to streamline system development and maintenance.

The DP83TD555J-Q1 is an IEEE802.3cg 10BASE-T1S and Open Alliance (OA) TC10, TC14 compliant Serial Peripheral Interface (SPI) MAC-PHY Ethernet transceiver. The device supports 10Mbps multi-drop or point-to-point half-duplex communication over unshielded twisted pair cables with extended common mode voltage tolerance. The device communicates to a host controller or switch using OA SPI.

The DP83TD555J-Q1 integrates IEEE802.3 Media Access Controller (MAC) that enables microcontrollers with SPI to seamlessly connect to Ethernet networks using the 10BASE-T1S bus.

The DP83TD555J-Q1 incorporates TC10 wake/sleep features to enable efficient system-level power consumption. The device supports remote wake-up over the Ethernet data line. When a wake-up event is detected, the DP83TD555J-Q1 initiates system start-up by driving INH high. The device also integrates IEEE 1588v2 /802.1AS to enable accurate time synchronization and hardware timestamping for time-critical automotive and industrial applications.

The DP83TD555J-Q1 is equipped with diagnostic features such as cable fault detection, undervoltage and overtemperature monitoring to streamline system development and maintenance.
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* Data sheet DP83TD555J-Q1 Automotive 10BASE-T1S Multidrop OA SPI MAC-PHY Ethernet Transceiver datasheet PDF | HTML 15 Dec 2025
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Technical article How Ethernet accelerates the move to software-defined vehicles (Rev. A) PDF | HTML 05 Jan 2024

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