TSW14DL3200EVM

Data capture/pattern generator: data converter evaluation module with 48 LVDS lanes up to 1.6Gbps

TSW14DL3200EVM

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Overview

The TSW14DL3200 evaluation module (EVM) is a next-generation data capture and pattern-generation tool that is used with RF-sampling and GSPS data-converter EVMs featuring LVDS interfaces. The card interfaces through two connectors – one for receive and one for transmit – each having four data buses consisting of 12 data pairs (one strobe pair and one clock pair).

Features
  • Populated with the Xilinx® XCKU060 Kintex® UltraScale™ field programmable gate array (FPGA)
  • 400-pin Samtec® SEARAY™ header connects directly through LVDS interface for data capture or data pattern generation
  • 48 transmit and 48 receive high-speed LVDS pairs at speeds up to 1.6Gbps
  • Onboard high-speed USB 3.0-to-parallel converter bridges the FPGA interface to the host PC and GUI

  • TSW14DL3200EVM circuit board
  • USB cable 3.0 (2 m)
  • Power cable

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Evaluation board

TSW14DL3200EVM — Data capture/pattern generator: data converter evaluation module with 48 LVDS lanes up to 1.6Gbps

Supported products & hardware

Supported products & hardware

Hardware development
Evaluation board
DAC12DL3200EVM DAC12DL3200 evaluation module for 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling DAC TSW12D1620EVM-CVAL ADC12D1620QML-SP evaluation module for 300-krad, 12-bit, dual 1.6-GSPS or single 3.2-GSPS ADC
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TSW14DL3200EVM Data capture/pattern generator: data converter evaluation module with 48 LVDS lanes up to 1.6Gbps

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Version: null
Release date:
Hardware development
Evaluation board
DAC12DL3200EVM DAC12DL3200 evaluation module for 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling DAC TSW12D1620EVM-CVAL ADC12D1620QML-SP evaluation module for 300-krad, 12-bit, dual 1.6-GSPS or single 3.2-GSPS ADC
Firmware

SLVC814 — TSW14DL3200 ADC12DL3200 Reference Design Firmware

Supported products & hardware

Supported products & hardware

Products
High-speed ADCs (≥10 MSPS)
ADC12DL3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling analog-to-digital converter (LVDS interface)
Hardware development
Evaluation board
TSW14DL3200EVM Data capture/pattern generator: data converter evaluation module with 48 LVDS lanes up to 1.6Gbps
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SLVC814 TSW14DL3200 ADC12DL3200 Reference Design Firmware

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Version: 01.00.00.00
Release date: Dec 6, 2020
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Products
High-speed ADCs (≥10 MSPS)
ADC12DL3200 12-bit, dual 3.2-GSPS or single 6.4-GSPS, RF-sampling analog-to-digital converter (LVDS interface)
Hardware development
Evaluation board
TSW14DL3200EVM Data capture/pattern generator: data converter evaluation module with 48 LVDS lanes up to 1.6Gbps

Release Information

The design resource accessed as www.ti.com/lit/zip/slvc814 or www.ti.com/lit/xx/slvc814/slvc814.zip has been migrated to a new user experience at www.ti.com/tool/download/SLVC814. Please update any bookmarks accordingly.
TI's Standard Terms and Conditions for Evaluation Items apply.

Design files

Technical documentation

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Type Title Date
* EVM User's guide ADC12DLXX00 Evaluation Module User's Guide (Rev. A) PDF | HTML Dec 7, 2023
* EVM User's guide TSW14DL3200EVM High-Speed LVDS Data Capture and Pattern Generator User's Guide May 15, 2018
Certificate TSW14DL3200EVM EU Declaration of Conformity (DoC) Jan 2, 2019

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