SLAAEO6A September 2024 – August 2025 MSPM0C1106 , MSPM0G3507
This subsystem demonstrates how to represent multiple comparators with a single integrated comparator and software in an MSPM0 microcontroller. The process allows the designer to maximize the comparator function and utilize more theoretical comparators than are physically on the device. This example specifically cycles through three different comparator configurations and input pins while setting three output pins with the results as shown in Figure 1-1.
Utilizing the customizable IO MUXing for the MSPM0 comparator, this example enables multiple signal inputs for the same comparator. The three signal inputs for this example are on the COMP_IN0+, COMP_IN0-, and COMP_IN1- pins as shown in Figure 1-2.
Table 2-1 describes the required integrated COMP and GPIOs.
Peripheral Used | Notes |
---|---|
Comparator | Called COMP_INST in code (Includes 8-bit reference DAC) |
GPIO | The three GPIOs are referred to as pins A, B, and C. |