SNAS901
September 2025
CDCLVP111-SEP
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Parameter Measurement Information
6.1
Differential Voltage Measurement Terminology
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Fanout Buffer for Line Card Application
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
LVPECL Output Termination
8.2.1.2.2
Input Termination
8.2.1.3
Application Curves
8.3
Power Supply Recommendations
8.3.1
Power-Supply Filtering
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
PACKAGE OPTION ADDENDUM
11.1
Tape and Reel Information
Package Options
Mechanical Data (Package|Pins)
VFP|32
MPQF098C
Thermal pad, mechanical data (Package|Pins)
VFP|32
PPTD258B
Orderable Information
snas901_oa
Data Sheet
CDCLVP111-SEP Low-Voltage 1:10 LVPECL With Selectable Input Clock Driver