LMK61PDEVM
LMK61PDEVM 超低ジッタ、ピン選択可能なオシレータ評価モジュール
LMK61PDEVM
概要
The LMK61PDEVM evaluation modules provides a complete platform to evaluate the 100-fs RMS jitter performance and configurability of the Texas Instruments LMK61PD Ultra-Low Jitter Pin Selectable Differential Oscillator with 7 unique reference clock frequencies and configurable output format.
The LMK61PDEVM can be used as a high performance clock source for jitter criticial applications and can easily be configured to any user selected predefined frequency and output format. The onboard configurable jumpers allows for device configuration, allowing the user to select from one of seven unique output frequencies as well as output format. The edge-launch SMA ports provide access to the LMK61PD’s differential clock output for interfacing to test equipment or reference boards using commercially available coaxial cables, adapters, or baluns (not included).
特長
- Ultra low jitter differential clock generation
- Powered over USB or externally (SMA connector)
- Pin Selectable output frequency (7 total)
- Pin Selectable output format (LVPECL, LVDS, or HCSL)
- LMK61PDEVM
- 3-ft. USB cable, Q362-ND
リニア レギュレータと低ドロップアウト (LDO) レギュレータ
購入と開発の開始
LMK61PDEVM — LMK61PDEVM 超低ジッタ、ピン選択可能なオシレータ評価モジュール
LMK61PDEVM — LMK61PDEVM 超低ジッタ、ピン選択可能なオシレータ評価モジュール
技術資料
| タイプ | タイトル | 最新の英語版をダウンロード | 日付 | |||
|---|---|---|---|---|---|---|
| * | EVM ユーザー ガイド (英語) | LMK61PDEVM User's Guide (Rev. A) | 2015/11/20 | |||
| 証明書 | LMK61PDEVM EU Declaration of Conformity (DoC) | 2019/01/02 | ||||
| データシート | LMK61PD0A2 Ultra-Low Jitter Pin Selectable Oscillator データシート (Rev. A) | PDF | HTML | 2015/11/03 |